[U-Boot] [PATCH 00/30] General fixes / cleanup for RISC-V and improvements to qemu-riscv
Lukas Auer
lukas.auer at aisec.fraunhofer.de
Fri Oct 19 22:07:13 UTC 2018
This patch series includes general fixes and cleanup for RISC-V. It also
adds support for booting Linux on qemu-riscv. At the moment, only
single-core systems are supported. Support for multi-core systems will
be added with a future patch series.
To boot Linux on qemu-riscv, Linux must be compiled into BBL as a
payload. BBL must be included in a FIT image and supplied to QEMU with
the -kernel parameter. Its location in memory is embedded in the device
tree, which QEMU passes to u-boot.
To test this, QEMU and riscv-pk (BBL) must be modified. QEMU is modified
to add support for loading binary files (FIT images in this case) in
addition to ELF files. riscv-pk must be modified to adjust the link
address and to ignore the kernel address from the device tree. A pull
request for QEMU, which implements this, is available at [1]. A modified
version of riscv-pk is available at [2].
[1]: https://github.com/riscv/riscv-qemu/pull/175
[2]: https://github.com/lukasauer/riscv-pk/tree/riscv-u-boot
Lukas Auer (30):
tools: .gitignore: add prelink-riscv
riscv: ignore device tree binaries
dts: riscv: update makefile to also clean the RISC-V dts directory
riscv: rename CPU_RISCV_32/64 to match architecture names
ARCH_RV32I/64I
riscv: select CONFIG_PHYS_64BIT on RV64I systems
riscv: add Kconfig entries for the C and A ISA extensions
riscv: set -march and -mabi based on the Kconfig configuration
riscv: add Kconfig entries for the code model
riscv: move target selection into separate file
riscv: enable -fdata-sections
riscv: fix use of incorrectly sized variables
riscv: make use of the barrier functions from Linux
riscv: do not reimplement generic io functions
riscv: complete the list of exception codes
riscv: treat undefined exception codes as reserved
riscv: hang on unhandled exceptions
riscv: implement the invalidate_icache_* functions
riscv: invalidate the instruction cache before jumping to Linux
riscv: fix inconsistent use of spaces and tabs in start.S
riscv: align mtvec on a 4-byte boundary
riscv: remove CONFIG_INIT_CRITICAL
riscv: remove unused labels in start.S
riscv: do not blindly modify the mstatus CSR
riscv: save hart ID and device tree passed by prior boot stage
riscv: qemu: use device tree passed by prior boot stage
bdinfo: riscv: print fdt_blob address
riscv: qemu: support booting Linux
riscv: align bootm implementation with that of other architectures
dm: core: add missing prototype for ofnode_read_u64
riscv: qemu: detect and boot the kernel passed by QEMU
arch/riscv/Kconfig | 54 ++--
arch/riscv/Kconfig.board | 14 +
arch/riscv/Makefile | 16 ++
arch/riscv/config.mk | 7 +-
arch/riscv/cpu/cpu.c | 6 +
arch/riscv/cpu/start.S | 339 +++++++++++-------------
arch/riscv/dts/.gitignore | 1 +
arch/riscv/include/asm/barrier.h | 67 +++++
arch/riscv/include/asm/io.h | 48 +---
arch/riscv/include/asm/posix_types.h | 6 +-
arch/riscv/include/asm/types.h | 4 +
arch/riscv/lib/bootm.c | 93 +++++--
arch/riscv/lib/cache.c | 10 +
arch/riscv/lib/interrupts.c | 31 ++-
arch/riscv/lib/setjmp.S | 2 +-
board/emulation/qemu-riscv/Kconfig | 1 +
board/emulation/qemu-riscv/qemu-riscv.c | 35 ++-
cmd/bdinfo.c | 2 +
configs/ax25-ae350_defconfig | 2 +-
configs/qemu-riscv32_defconfig | 4 +-
configs/qemu-riscv64_defconfig | 6 +-
dts/Makefile | 2 +-
include/config_distro_bootcmd.h | 8 +-
include/configs/qemu-riscv.h | 13 +
include/dm/ofnode.h | 10 +
tools/.gitignore | 1 +
26 files changed, 494 insertions(+), 288 deletions(-)
create mode 100644 arch/riscv/Kconfig.board
create mode 100644 arch/riscv/dts/.gitignore
create mode 100644 arch/riscv/include/asm/barrier.h
--
2.17.2
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