[U-Boot] [PATCH 20/30] riscv: align mtvec on a 4-byte boundary

[Rick Chen]

<rick at andestech.com> 於 2018年10月23日 週二 下午4:41寫道：
>
> > Hi Lukas,
> >
> > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer <lukas.auer at aisec.fraunhofer.de>
> > wrote:
> > >
> > > The machine trap-vector base address (mtvec) must be aligned on a
> > > 4-byte boundary. Add the necessary align directive to trap_entry.
> > >
> >
> > I don't think this explicit alignment is needed because the instructions before
> > trap_entry are already on 4-byte boundary.
> >

Hi, Lukas and Bin

I think .aling 2 is necessary.

trap_entry is 4 -byte aligned now.
But if someone add some codes ahead of trap_entry.
trap_entry may still have chance to become NOT 4 byte aligned.
With this prevention will be more safety than without it.

Linux Kernel have a patch to prevent from stvec not 4 byte aligned.

commit 94f592f0e5b9c17a7505119a2d6c0f1f529ae93d
Author: Zong Li <zong at andestech.com>
Date:   Thu Aug 2 23:21:56 2018 +0800

    RISC-V: Add the directive for alignment of stvec's value

    The stvec's value must be 4 byte alignment by specification definition.
    These directives avoid to stvec be set the non-alignment value.

    Signed-off-by: Zong Li <zong at andestech.com>
    Signed-off-by: Palmer Dabbelt <palmer at sifive.com>


Rick

> > > This patch also removes the global directive for trap_entry, which is
> > > not required.
> > >
> > > Signed-off-by: Lukas Auer <lukas.auer at aisec.fraunhofer.de>
> > > ---
> > >
> > >  arch/riscv/cpu/start.S | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> >
> > Regards,
> > Bin