[U-Boot] [PATCH v5 00/13] Support for the Faraday ftgmac100 controller
Cédric Le Goater
clg at kaod.org
Mon Oct 29 06:06:28 UTC 2018
Hello,
This series re-enables the Faraday ftgmac100 controller driver and its
Aspeed variant as as one can find on the OpenPOWER platforms. The
driver is largely reworked to support the driver model and also adds
the MDIO bus and phylib support. It was tested on the AST2500 evb.
Git tree available here:
https://github.com/legoater/u-boot/commits/aspeed
Thanks,
C.
Changes since v4 :
- introduced a wait_for_bit macro to handle timeouts when
transmitting
Changes since v3 :
It didn't seem necessary to remove the 'dev' argument from the
ftgmac100_phy_init() and ftgmac100_phy_reset() function prototypes as
the code is completely reworked in patch 5.
- improved ftgmac100_mdio_init() and ftgmac100_phy_init() prototypes
- introduced a ftgmac100_wait_for_txdone() function similar to the
wait_for_bit_*() macros.
Changes since v2 :
- split changes in multiple patches to preserve git history, but the
code has not changed since the reviewed v2 patchset.
- included a couple more changes to sync the DTS file with Linux.
Changes since v1 :
- improved comments in the code
- changed the type of 'iobase' to 'struct ftgmac100 *' to remove the
casts in other routines.
- replaced the loop in the mdio methods by a call to readl_poll_timeout()
and fixed the returned value.
- added a flush cache on the arrays of TX and RX descriptors in
ftgmac100_start()
- fixed returned value of
- added a timer loop to catch transmit timeouts
- introduced a clk_bulk
- improved Kconfig description
- introduced a udevice_id .data model
- dropped is_aspeed bool
- dropped MDIO interface setting for Aspeed SoC. The default is
correct.
- removed the clcoks which are now handled automatically in the
ftgmac100 driver
- introduced a fix for the D2-PLL clock setting
Cédric Le Goater (13):
net: ftgmac100: use the BIT() macro
net: ftgmac100: use the aligned() macro
net: ftgmac100: convert to driver model
net: ftgmac100: use setbits_le32() in the reset method
net: ftgmac100: add MDIO bus and phylib support
net: ftgmac100: convert the RX/TX descriptor arrays
net: ftgmac100: handle timeouts when transmitting
net: ftgmac100: add clock support
aspeed: ast2500: fix missing break in D2PLL clock enablement
net: ftgmac100: Add support for the Aspeed SoC
aspeed: Update ast2500 SoC DTS file to Linux v4.17-rc6 level
aspeed: Activate ethernet devices on the ast2500 Eval Board
aspeed: ast2500: fix D2-PLL clock setting in RGMII mode
drivers/net/ftgmac100.h | 158 +--
include/netdev.h | 1 -
drivers/clk/aspeed/clk_ast2500.c | 39 +
drivers/net/ftgmac100.c | 732 +++++------
arch/arm/dts/ast2500-evb.dts | 23 +
arch/arm/dts/ast2500.dtsi | 1949 ++++++++++++++++++------------
configs/evb-ast2500_defconfig | 8 +
drivers/net/Kconfig | 26 +
8 files changed, 1707 insertions(+), 1229 deletions(-)
--
2.17.2
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