[U-Boot] [PATCH v2 00/29] General fixes / cleanup for RISC-V and improvements to qemu-riscv

Lukas Auer lukas.auer at aisec.fraunhofer.de
Tue Oct 30 12:55:23 UTC 2018


This patch series includes general fixes and cleanup for RISC-V. It also
adds support for booting Linux on qemu-riscv. At the moment, only
single-core systems are supported. Support for multi-core systems will
be added with a future patch series.

To boot Linux on qemu-riscv, Linux must be compiled into BBL as a
payload. BBL must be included in a FIT image and supplied to QEMU with
the -kernel parameter. Its location in memory is embedded in the device
tree, which QEMU passes to u-boot.
To test this, QEMU and riscv-pk (BBL) must be modified. QEMU is modified
to add support for loading binary files (FIT images in this case) in
addition to ELF files. riscv-pk must be modified to adjust the link
address. A pull request for QEMU, which implements this, is available at
[1]. A modified version of riscv-pk is available at [2].

This series applies on top of u-boot-dm/next.

[1]: https://github.com/riscv/riscv-qemu/pull/175
[2]: https://github.com/lukasauer/riscv-pk/tree/riscv-u-boot

Changes in v2:
- Replace the description of RISCV_ISA_C with that of the Linux kernel,
as suggested by Bin Meng
- Change ISA string construction, as suggested by Bin Meng
- Change ISA string construction, as suggested by Bin Meng
- Remove 0-padding in the format string to avoid printing 16 digits on
RV32I systems
- Clarify reasoning behind patch in commit message
- New patch to replace patch "riscv: remove CONFIG_INIT_CRITICAL"
- Drop removal of code that stores the contents of a2; this broke the
board ax25-ae350. The code will be removed again in a future patch.
- Rebase onto u-boot-dm/next
- New patch
- Rebase onto u-boot-dm/next
- Move prototype location to match the location of the function in
ofnode.c
- Rebase onto u-boot-dm/next
- Boot Linux with the device tree provided by the prior boot stage
- New patch

Bin Meng (1):
  Drop CONFIG_INIT_CRITICAL

Lukas Auer (28):
  tools: .gitignore: add prelink-riscv
  dts: riscv: update makefile to also clean the RISC-V dts directory
  riscv: rename CPU_RISCV_32/64 to match architecture names
    ARCH_RV32I/64I
  riscv: select CONFIG_PHYS_64BIT on RV64I systems
  riscv: add Kconfig entries for the C and A ISA extensions
  riscv: set -march and -mabi based on the Kconfig configuration
  riscv: add Kconfig entries for the code model
  riscv: enable -fdata-sections
  riscv: fix use of incorrectly sized variables
  riscv: make use of the barrier functions from Linux
  riscv: do not reimplement generic io functions
  riscv: complete the list of exception codes
  riscv: treat undefined exception codes as reserved
  riscv: hang on unhandled exceptions
  riscv: implement the invalidate_icache_* functions
  riscv: invalidate the instruction cache before jumping to Linux
  riscv: fix inconsistent use of spaces and tabs in start.S
  riscv: align mtvec on a 4-byte boundary
  riscv: remove unused labels in start.S
  riscv: do not blindly modify the mstatus CSR
  riscv: save hart ID and device tree passed by prior boot stage
  riscv: qemu: use device tree passed by prior boot stage
  riscv: store device tree passed by prior boot stage in environment
  riscv: qemu: support booting Linux
  riscv: align bootm implementation with that of other architectures
  dm: core: add missing prototype for ofnode_read_u64
  riscv: qemu: detect and boot the kernel passed by QEMU
  riscv: qemu: clear kernel-start/-end in device tree as workaround for
    BBL

 arch/Kconfig                            |   1 +
 arch/nds32/cpu/n1213/start.S            |  51 ----
 arch/riscv/Kconfig                      |  47 +++-
 arch/riscv/Makefile                     |  27 ++
 arch/riscv/config.mk                    |   7 +-
 arch/riscv/cpu/cpu.c                    |  13 +
 arch/riscv/cpu/start.S                  | 342 ++++++++++++------------
 arch/riscv/include/asm/barrier.h        |  67 +++++
 arch/riscv/include/asm/io.h             |  48 +---
 arch/riscv/include/asm/posix_types.h    |   6 +-
 arch/riscv/include/asm/types.h          |   4 +
 arch/riscv/include/asm/u-boot-riscv.h   |   1 +
 arch/riscv/lib/bootm.c                  |  98 +++++--
 arch/riscv/lib/cache.c                  |  10 +
 arch/riscv/lib/interrupts.c             |  31 ++-
 arch/riscv/lib/setjmp.S                 |   2 +-
 board/armltd/integrator/README          |   4 +-
 board/emulation/qemu-riscv/Kconfig      |   2 +
 board/emulation/qemu-riscv/qemu-riscv.c |  73 ++++-
 configs/ax25-ae350_defconfig            |   2 +-
 configs/qemu-riscv32_defconfig          |   4 +-
 configs/qemu-riscv64_defconfig          |   6 +-
 dts/Makefile                            |   2 +-
 include/common.h                        |   5 -
 include/config_distro_bootcmd.h         |   8 +-
 include/configs/qemu-riscv.h            |  14 +
 include/dm/ofnode.h                     |  10 +
 scripts/config_whitelist.txt            |   1 -
 tools/.gitignore                        |   1 +
 29 files changed, 543 insertions(+), 344 deletions(-)
 create mode 100644 arch/riscv/include/asm/barrier.h

-- 
2.17.2



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