[U-Boot] [RESEND PATCHv4 1/9] armv8: fsl-layerscpae: correct the PCIe controllers' region size

[Z.q. Hou]

Hi Bin,


> -----Original Message-----
> From: Bin Meng [mailto:bmeng.cn at gmail.com]
> Sent: 2019年4月1日 11:22
> To: Z.q. Hou <zhiqiang.hou at nxp.com>
> Cc: u-boot at lists.denx.de; albert.u.boot at aribaud.net; Priyanka Jain
> <priyanka.jain at nxp.com>; York Sun <york.sun at nxp.com>;
> sriram.dash at nxp.com; yamada.masahiro at socionext.com; Prabhakar
> Kushwaha <prabhakar.kushwaha at nxp.com>; Mingkai Hu
> <mingkai.hu at nxp.com>; M.h. Lian <minghuan.lian at nxp.com>
> Subject: Re: [RESEND PATCHv4 1/9] armv8: fsl-layerscpae: correct the PCIe
> controllers' region size
> 
> On Mon, Mar 25, 2019 at 10:24 AM Z.q. Hou <zhiqiang.hou at nxp.com> wrote:
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> >
> > The LS2080A has 8GB region for each PCIe controller, while the other
> > platforms have 32GB.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> > ---
> > V4:
> >  - No change
> >
> >  arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> 
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>

Thanks a lot for your review!

Zhiqiang