[U-Boot] [PATCH 28/40] x86: Add a sysreset driver for the Intel PCH

Simon Glass sjg at chromium.org
Wed Apr 3 02:22:35 UTC 2019


Hi Bin,

On Fri, 22 Feb 2019 at 00:20, Bin Meng <bmeng.cn at gmail.com> wrote:
>
> Hi Simon,
>
> On Wed, Jan 30, 2019 at 12:00 PM Simon Glass <sjg at chromium.org> wrote:
> >
> > Intel SoCs support a fairly stardard reset mechanism which can support
> > powering off the device. Add support for this and enable it by default on
> > broadwell, which already has the necessary pm.h header file.
> >
> > This driver augments the standard x86 sysreset driver.
> >
>
> I think we need update the existing sysreset_x86 driver to support
> SYSRESET_POWER_OFF, instead of creating a new driver to do such.
>
> We can add a new PCH ioctl code to get the pmbase, and do the ACPI
> power off in the sysreset_x86 driver.

So are you saying that the registers are the same for all x86 chips?
>From what I can tell, the offsets vary.

Regards,
Simon

>
> > Signed-off-by: Simon Glass <sjg at chromium.org>
> > ---
> >
> >  arch/x86/cpu/broadwell/Kconfig        |   1 +
> >  drivers/sysreset/Kconfig              |   9 ++
> >  drivers/sysreset/Makefile             |   1 +
> >  drivers/sysreset/sysreset_intel_pch.c | 125 ++++++++++++++++++++++++++
> >  4 files changed, 136 insertions(+)
> >  create mode 100644 drivers/sysreset/sysreset_intel_pch.c
> >
>
> Regards,
> Bin


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