[U-Boot] Pull request: u-boot-riscv/master

[uboot at andestech.com]

Hi Tom,

Please pull some riscv updates:

1. RISC-V arch support SMP.
2. Support Andestech's PLIC and PLMT.
2. qemu, fu54e, ae350 boards enable SMP by default.
3. Fix CONFIG_DEFAULT_DEVICE_TREE failure.

https://travis-ci.org/rickchen36/u-boot-riscv/builds/517045091

Thanks
Rick


The following changes since commit 0e62d5b2abb69ddc9e58215e2d8dfa5d33996b8a:

  Merge tag 'u-boot-imx-20190405' of git://git.denx.de/u-boot-imx (2019-04-05 09:09:56 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to 48b90d9db5d32e587901c4f33175488dd20fe0a5:

  riscv: dts: fix CONFIG_DEFAULT_DEVICE_TREE failure (2019-04-08 09:46:00 +0800)

----------------------------------------------------------------
Lukas Auer (11):
      riscv: add infrastructure for calling functions on other harts
      riscv: import the supervisor binary interface header file
      riscv: implement IPI platform functions using SBI
      riscv: delay initialization of caches and debug UART
      riscv: save hart ID in register tp instead of s0
      riscv: add support for multi-hart systems
      riscv: boot images passed to bootm on all harts
      riscv: do not rely on hart ID passed by previous boot stage
      riscv: hang if relocation of secondary harts fails
      riscv: fu540: enable SMP
      riscv: qemu: enable SMP

Rick Chen (7):
      riscv: Add a SYSCON driver for Andestech's PLIC
      riscv: Add a SYSCON driver for Andestech's PLMT
      riscv: ax25: Add platform-specific Kconfig options
      riscv: ax25: Andes specific cache shall only support in M-mode
      riscv: dts: ae350 support SMP
      riscv: ae350: enable SMP
      riscv: dts: fix CONFIG_DEFAULT_DEVICE_TREE failure

 arch/riscv/Kconfig                   |  46 +++++++++++++++++++++++++++++++
 arch/riscv/cpu/ax25/Kconfig          |   7 +++++
 arch/riscv/cpu/cpu.c                 |   9 +++++-
 arch/riscv/cpu/start.S               | 167 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------
 arch/riscv/dts/Makefile              |   2 ++
 arch/riscv/dts/ae350_32.dts          |  81 +++++++++++++++++++++++++++++++++++++++---------------
 arch/riscv/dts/ae350_64.dts          |  81 +++++++++++++++++++++++++++++++++++++++---------------
 arch/riscv/include/asm/csr.h         |   1 +
 arch/riscv/include/asm/global_data.h |  12 ++++++++
 arch/riscv/include/asm/sbi.h         |  94 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/smp.h         |  53 ++++++++++++++++++++++++++++++++++++
 arch/riscv/include/asm/syscon.h      |   4 +--
 arch/riscv/lib/Makefile              |   4 +++
 arch/riscv/lib/andes_plic.c          | 113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/andes_plmt.c          |  53 ++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/asm-offsets.c         |   1 +
 arch/riscv/lib/bootm.c               |  13 ++++++++-
 arch/riscv/lib/sbi_ipi.c             |  25 +++++++++++++++++
 arch/riscv/lib/smp.c                 | 118 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 board/AndesTech/ax25-ae350/Kconfig   |   1 +
 board/emulation/qemu-riscv/Kconfig   |   1 +
 board/sifive/fu540/Kconfig           |   1 +
 configs/ae350_rv32_defconfig         |   1 -
 configs/ae350_rv64_defconfig         |   1 -
 24 files changed, 829 insertions(+), 60 deletions(-)
 create mode 100644 arch/riscv/include/asm/sbi.h
 create mode 100644 arch/riscv/include/asm/smp.h
 create mode 100644 arch/riscv/lib/andes_plic.c
 create mode 100644 arch/riscv/lib/andes_plmt.c
 create mode 100644 arch/riscv/lib/sbi_ipi.c
 create mode 100644 arch/riscv/lib/smp.c