[U-Boot] [PATCH v1 09/29] imx6: aristainetos: prepare dts for other board versions
Heiko Schocher
hs at denx.de
Sun Dec 1 11:23:12 CET 2019
as we switch to support DM and DTS, rework the existing
DTS trees. Change also Linux specific Device trees, goal
is to push this changes to linux.
Collect U-Boot specific changes in separate "*u-boot*" dts
files.
Signed-off-by: Heiko Schocher <hs at denx.de>
---
.../dts/imx6dl-aristainetos2_4-u-boot.dtsi | 13 +
arch/arm/dts/imx6dl-aristainetos2_4.dts | 79 +--
arch/arm/dts/imx6dl-aristainetos2_4.dtsi | 84 +++
.../dts/imx6dl-aristainetos2_7-u-boot.dtsi | 19 +
arch/arm/dts/imx6dl-aristainetos2_7.dts | 50 +-
arch/arm/dts/imx6dl-aristainetos2_7.dtsi | 58 +++
.../arm/dts/imx6qdl-aristainetos2-common.dtsi | 492 ++++++++++++++++++
.../arm/dts/imx6qdl-aristainetos2-u-boot.dtsi | 101 ++++
arch/arm/dts/imx6qdl-aristainetos2.dtsi | 487 +++--------------
board/aristainetos/MAINTAINERS | 10 +-
board/aristainetos/aristainetos.c | 68 +++
configs/aristainetos2_defconfig | 7 +
12 files changed, 914 insertions(+), 554 deletions(-)
create mode 100644 arch/arm/dts/imx6dl-aristainetos2_4-u-boot.dtsi
create mode 100644 arch/arm/dts/imx6dl-aristainetos2_4.dtsi
create mode 100644 arch/arm/dts/imx6dl-aristainetos2_7-u-boot.dtsi
create mode 100644 arch/arm/dts/imx6dl-aristainetos2_7.dtsi
create mode 100644 arch/arm/dts/imx6qdl-aristainetos2-common.dtsi
create mode 100644 arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi
diff --git a/arch/arm/dts/imx6dl-aristainetos2_4-u-boot.dtsi b/arch/arm/dts/imx6dl-aristainetos2_4-u-boot.dtsi
new file mode 100644
index 0000000000..ac7052c7b7
--- /dev/null
+++ b/arch/arm/dts/imx6dl-aristainetos2_4-u-boot.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Heiko Schocher <hs at denx.de>
+ */
+
+#include <imx6qdl-aristainetos2-u-boot.dtsi>
+
+&lcd_panel {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu_disp>;
+ enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
+ backlight = <&backlight>;
+};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_4.dts b/arch/arm/dts/imx6dl-aristainetos2_4.dts
index 0e28a70e78..0157e244ae 100644
--- a/arch/arm/dts/imx6dl-aristainetos2_4.dts
+++ b/arch/arm/dts/imx6dl-aristainetos2_4.dts
@@ -1,46 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0)
/*
* support for the imx6 based aristainetos2 board
+ * parts for 4.3 inch LG display on spi1 port0
*
* Copyright (C) 2019 Heiko Schocher <hs at denx.de>
* Copyright (C) 2015 Heiko Schocher <hs at denx.de>
*
*/
/dts-v1/;
-#include "imx6dl.dtsi"
+
+#include "imx6dl-aristainetos2_4.dtsi"
#include "imx6qdl-aristainetos2.dtsi"
/ {
model = "aristainetos2 i.MX6 Dual Lite Board 4";
compatible = "fsl,imx6dl";
- memory at 10000000 {
- device_type = "memory";
- reg = <0x10000000 0x40000000>;
- };
-
- display0: disp0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx-parallel-display";
- interface-pix-fmt = "rgb24";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ipu_disp>;
-
- port at 0 {
- reg = <0>;
- display0_in: endpoint {
- remote-endpoint = <&ipu1_di0_disp0>;
- };
- };
-
- port at 1 {
- reg = <1>;
- display_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
- };
};
&ecspi1 {
@@ -74,51 +49,3 @@
};
};
};
-
-&i2c3 {
- touch: touch at 4b {
- compatible = "atmel,maxtouch";
- reg = <0x4b>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 8>;
- };
-};
-
-&ipu1_di0_disp0 {
- remote-endpoint = <&display0_in>;
-};
-
-&iomuxc {
- pinctrl_ipu_disp: ipudisp1grp {
- fsl,pins = <
- MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x31
- MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xE1
- MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
- MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
- MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xE1
- MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xE1
- MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xE1
- MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xE1
- MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xE1
- MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xE1
- MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xE1
- MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xE1
- MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xE1
- MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xE1
- MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xE1
- MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xE1
- MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xE1
- MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xE1
- MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xe1
- MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xE1
- MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xE1
- MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xE1
- MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xE1
- MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xE1
- MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xE1
- MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xE1
- MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xE1
- MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xE1
- >;
- };
-};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_4.dtsi b/arch/arm/dts/imx6dl-aristainetos2_4.dtsi
new file mode 100644
index 0000000000..be4601b4b2
--- /dev/null
+++ b/arch/arm/dts/imx6dl-aristainetos2_4.dtsi
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * support for the imx6 based aristainetos2 board
+ * parts for 4.3 inch LG display on the parallel port and atmel maxtouch
+ *
+ * Copyright (C) 2019 Heiko Schocher <hs at denx.de>
+ * Copyright (C) 2015 Heiko Schocher <hs at denx.de>
+ *
+ */
+/dts-v1/;
+#include "imx6dl.dtsi"
+
+/ {
+ display0: disp0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx-parallel-display";
+ interface-pix-fmt = "rgb24";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu_disp>;
+
+ port at 0 {
+ reg = <0>;
+ display0_in: endpoint {
+ remote-endpoint = <&ipu1_di0_disp0>;
+ };
+ };
+
+ port at 1 {
+ reg = <1>;
+ display_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+};
+
+&i2c3 {
+ touch: touch at 4b {
+ compatible = "atmel,maxtouch";
+ reg = <0x4b>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <9 8>;
+ };
+};
+
+&ipu1_di0_disp0 {
+ remote-endpoint = <&display0_in>;
+};
+
+&iomuxc {
+ pinctrl_ipu_disp: ipudisp1grp {
+ fsl,pins = <
+ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x31
+ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xE1
+ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
+ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
+ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xE1
+ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xE1
+ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xE1
+ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xE1
+ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xE1
+ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xE1
+ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xE1
+ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xE1
+ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xE1
+ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xE1
+ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xE1
+ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xE1
+ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xE1
+ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xE1
+ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xe1
+ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xE1
+ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xE1
+ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xE1
+ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xE1
+ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xE1
+ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xE1
+ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xE1
+ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xE1
+ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xE1
+ >;
+ };
+};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_7-u-boot.dtsi b/arch/arm/dts/imx6dl-aristainetos2_7-u-boot.dtsi
new file mode 100644
index 0000000000..25bc562064
--- /dev/null
+++ b/arch/arm/dts/imx6dl-aristainetos2_7-u-boot.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Heiko Schocher <hs at denx.de>
+ */
+
+#include <imx6qdl-aristainetos2-u-boot.dtsi>
+/ {
+ vdd_panel_reg: regulator-panel {
+ compatible = "regulator-fixed";
+ regulator-name = "panel_regulator";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+};
+
+&panel0 {
+ power-supply = <&vdd_panel_reg>;
+};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_7.dts b/arch/arm/dts/imx6dl-aristainetos2_7.dts
index 320dbcffaf..0d1e83cb68 100644
--- a/arch/arm/dts/imx6dl-aristainetos2_7.dts
+++ b/arch/arm/dts/imx6dl-aristainetos2_7.dts
@@ -7,58 +7,10 @@
*
*/
/dts-v1/;
-#include "imx6dl.dtsi"
+#include "imx6dl-aristainetos2_7.dtsi"
#include "imx6qdl-aristainetos2.dtsi"
/ {
model = "aristainetos2 i.MX6 Dual Lite Board 7";
compatible = "fsl,imx6dl";
-
- memory at 10000000 {
- device_type = "memory";
- reg = <0x10000000 0x40000000>;
- };
-
- panel: panel {
- compatible = "lg,lb070wv8";
- backlight = <&backlight>;
- enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&lvds0_out>;
- };
- };
- };
-};
-
-&i2c3 {
- touch: touch at 4d {
- compatible = "atmel,maxtouch";
- reg = <0x4d>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 8>;
- };
-};
-
-&ldb {
- status = "okay";
-
- lvds-channel at 0 {
- status = "okay";
-
- port at 0 {
- reg = <0>;
- lvds0_in: endpoint {
- remote-endpoint = <&ipu1_di0_lvds0>;
- };
- };
-
- port at 4 {
- reg = <4>;
- lvds0_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
- };
};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_7.dtsi b/arch/arm/dts/imx6dl-aristainetos2_7.dtsi
new file mode 100644
index 0000000000..52d6a517a7
--- /dev/null
+++ b/arch/arm/dts/imx6dl-aristainetos2_7.dtsi
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * support for the imx6 based aristainetos2 board
+ * parts for 7 inch LG display connected to the LVDS port and atmel maxtouch
+ *
+ * Copyright (C) 2019 Heiko Schocher <hs at denx.de>
+ * Copyright (C) 2015 Heiko Schocher <hs at denx.de>
+ *
+ */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+
+#include "imx6dl.dtsi"
+
+/ {
+ panel0: panel_lg {
+ compatible = "lg,lb070wv8";
+ backlight = <&backlight>;
+ enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+ };
+};
+
+&i2c3 {
+ touch: touch at 4d {
+ compatible = "atmel,maxtouch";
+ reg = <0x4d>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <9 8>;
+ };
+};
+
+&ldb {
+ status = "okay";
+
+ lvds-channel at 0 {
+ status = "okay";
+
+ port at 0 {
+ reg = <0>;
+ lvds0_in: endpoint {
+ remote-endpoint = <&ipu1_di0_lvds0>;
+ };
+ };
+
+ port at 4 {
+ reg = <4>;
+ lvds0_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2-common.dtsi b/arch/arm/dts/imx6qdl-aristainetos2-common.dtsi
new file mode 100644
index 0000000000..2aa531b1ab
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-aristainetos2-common.dtsi
@@ -0,0 +1,492 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * support for the imx6 based aristainetos2 board
+ * parts common to all versions
+ *
+ * Copyright (C) 2019 Heiko Schocher <hs at denx.de>
+ * Copyright (C) 2015 Heiko Schocher <hs at denx.de>
+ *
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ aliases {
+ eeprom0 = &i2c_eeprom0;
+ pmic0 = &i2c_pmic0;
+ };
+
+ memory at 10000000 {
+ device_type = "memory";
+ reg = <0x10000000 0x40000000>;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 5000000>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <7>;
+ enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_usbh1_vbus: regulator-usbh1-vbus {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_aristainetos2_usbh1_vbus>;
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ reg_usbotg_vbus: regulator-usbotg-vbus {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_aristainetos2_usbotg_vbus>;
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&ecspi2 {
+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH &gpio2 27 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ i2c_pmic0: pmic at 58 {
+ compatible = "dlg,da9063";
+ /* the pmic uses addr 0x58 and 0x59 */
+ reg = <0x58>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <04 0x8>;
+
+ regulators {
+ bcore1 {
+ regulator-name = "bcore1";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ bcore2 {
+ regulator-name = "bcore2";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ bpro {
+ regulator-name = "bpro";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ bprob {
+ regulator-name = "bprob";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ bperi {
+ regulator-name = "bperi";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ bmem {
+ regulator-name = "bmem";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo2 {
+ regulator-name = "ldo2";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo3 {
+ regulator-name = "ldo3";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo4 {
+ regulator-name = "ldo4";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo5 {
+ regulator-name = "ldo5";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo6 {
+ regulator-name = "ldo6";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo7 {
+ regulator-name = "ldo7";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo8 {
+ regulator-name = "ldo8";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo9 {
+ regulator-name = "ldo9";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo10 {
+ regulator-name = "ldo10";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo11 {
+ regulator-name = "ldo11";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ bio {
+ regulator-name = "bio";
+ regulator-always-on = <1>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ };
+ };
+
+ tmp103: tmp103 at 71 {
+ compatible = "ti,tmp103";
+ reg = <0x71>;
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+
+ expander: tca6416 at 20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+
+ env_reset {
+ gpio-hog;
+ input;
+ gpios = <6 GPIO_ACTIVE_LOW>;
+ };
+ boot_rescue {
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ rtc at 68 {
+ compatible = "st,m41t11";
+ reg = <0x68>;
+ };
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ status = "okay";
+
+ i2c_eeprom0: eeprom at 50{
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c_eeprom1: eeprom at 57{
+ compatible = "atmel,24c64";
+ reg = <0x57>;
+ pagesize = <32>;
+ };
+};
+
+&gpio6 {
+ spi_bus_ena {
+ gpio-hog;
+ output-high;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&gpio7 {
+ bootsel0 {
+ gpio-hog;
+ input;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ };
+ bootsel1 {
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ };
+ bootsel2 {
+ gpio-hog;
+ input;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ };
+
+ soft_reset {
+ gpio-hog;
+ output-high;
+ gpios = <13 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-mode = "rgmii";
+ txd0-skew-ps = <0>;
+ txd1-skew-ps = <0>;
+ txd2-skew-ps = <0>;
+ txd3-skew-ps = <0>;
+ status = "okay";
+};
+
+&pcie {
+ reset-gpio = <&gpio2 16 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usbh1_vbus>;
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usbotg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ disable-over-current;
+ dr_mode = "host"; /* fixed configuration, ID pin not checked */
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio>;
+
+ pinctrl_audmux: audmux {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
+ >;
+ };
+
+ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 /* SS0# */
+ MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x100b1 /* SS1# */
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x400100b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ /* make sure pin is GPIO and not ENET_REF_CLK */
+ MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1a0b0
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b0
+ /* backlight enable */
+ MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
+ MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
+ MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_aristainetos2_usbh1_vbus: aristainetos-usbh1-vbus {
+ fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x400130b0>;
+ };
+
+ pinctrl_aristainetos2_usbotg_vbus: aristainetos-usbotg-vbus {
+ fsl,pins = <MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x400130b0>;
+ };
+};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi b/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi
new file mode 100644
index 0000000000..c713efd84c
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Heiko Schocher <hs at denx.de>
+ */
+
+/ {
+ chosen {
+ u-boot,dm-pre-reloc;
+ stdout-path = &uart2;
+ };
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdog1>;
+ };
+};
+
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl_gpio {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl_uart2 {
+ u-boot,dm-pre-reloc;
+};
+
+&aips2 {
+ u-boot,dm-pre-reloc;
+};
+
+&backlight {
+ pwms = <&pwm1 0 300000>;
+ default-brightness-level = <2>;
+};
+
+/*
+ * allow switching write protect pin by gpio,
+ * because "pinctrl-assert-gpios" from &ecspi1 isn't handled by u-boot
+ */
+&gpio2 {
+ u-boot,dm-pre-reloc;
+
+ wp_spi_nor {
+ gpio-hog;
+ output-high;
+ gpios = <15 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&iomuxc {
+ pinctrl-0 = <&pinctrl_gpio &pinctrl_gpio_fix>;
+ u-boot,dm-pre-reloc;
+
+ pinctrl_gpio_fix: gpiofixgrp {
+ /*
+ * usdhc2 has a levelshifter on the carrier board Rev. DV1,
+ * that will automatically detect the driving direction.
+ * During initialisation this isn't working correctly,
+ * which causes DAT3 to be driven low towards the SD-card.
+ * This causes a SD-card enetring the SPI-Mode
+ * and therefore getting inaccessible until next power cycle.
+ * As workaround we drive the DAT3 line as GPIO and set it high.
+ * This makes usdhc2 unusable in u-boot, but works for the
+ * initialisation in Linux
+ */
+ fsl,pins = <
+ MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x20000
+ >;
+ };
+};
+
+&gpio1 {
+ usdhc_fix {
+ gpio-hog;
+ output-high;
+ gpios = <12 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&gpio3 {
+ u-boot,dm-pre-reloc;
+};
+
+&gpio5 {
+ u-boot,dm-pre-reloc;
+};
+
+&ecspi4 {
+ u-boot,dm-pre-reloc;
+};
+
+&flash {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl_ecspi4 {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/dts/imx6qdl-aristainetos2.dtsi
index da6ab63808..788e13edad 100644
--- a/arch/arm/dts/imx6qdl-aristainetos2.dtsi
+++ b/arch/arm/dts/imx6qdl-aristainetos2.dtsi
@@ -9,73 +9,43 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
-/ {
- backlight: backlight {
- compatible = "pwm-backlight";
- pwms = <&pwm1 0 5000000>;
- brightness-levels = <0 4 8 16 32 64 128 255>;
- default-brightness-level = <7>;
- enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
- };
-
- reg_2p5v: regulator-2p5v {
- compatible = "regulator-fixed";
- regulator-name = "2P5V";
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2500000>;
- regulator-always-on;
- };
-
- reg_3p3v: regulator-3p3v {
- compatible = "regulator-fixed";
- regulator-name = "3P3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
+#include "imx6qdl-aristainetos2-common.dtsi"
- reg_usbh1_vbus: regulator-usbh1-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+/ {
+ leds {
+ compatible = "gpio-leds";
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_aristainetos2_usbh1_vbus>;
- regulator-name = "usb_h1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
+ pinctrl-0 = <&pinctrl_gpio>;
- reg_usbotg_vbus: regulator-usbotg-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_aristainetos2_usbotg_vbus>;
- regulator-name = "usb_otg_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-};
+ LED_blue {
+ label = "led_blue";
+ gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
+ };
-&audmux {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_audmux>;
- status = "okay";
-};
+ LED_green {
+ label = "led_green";
+ gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
+ };
-&can1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan1>;
- status = "okay";
-};
+ LED_red {
+ label = "led_red";
+ gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
+ };
-&can2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan2>;
- status = "okay";
+ LED_yellow {
+ label = "led_yellow";
+ gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;
+ };
+
+ LED_ena {
+ label = "led_ena";
+ gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&ecspi1 {
+ fsl,spi-num-chipselects = <3>;
cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH
&gpio4 10 GPIO_ACTIVE_HIGH
&gpio4 11 GPIO_ACTIVE_HIGH>;
@@ -84,18 +54,13 @@
status = "okay";
};
-&ecspi2 {
- cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH &gpio2 27 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi2>;
- status = "okay";
-};
-
&ecspi4 {
+ fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi4>;
status = "okay";
+ pinctrl-assert-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
flash: m25p80 at 1 {
#address-cells = <1>;
@@ -106,245 +71,29 @@
};
};
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- status = "okay";
-
- pmic at 58 {
- compatible = "dlg,da9063";
- reg = <0x58>;
- interrupt-parent = <&gpio1>;
- interrupts = <04 0x8>;
-
- regulators {
- bcore1 {
- regulator-name = "bcore1";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- bcore2 {
- regulator-name = "bcore2";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- bpro {
- regulator-name = "bpro";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- bperi {
- regulator-name = "bperi";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- bmem {
- regulator-name = "bmem";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo2 {
- regulator-name = "ldo2";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo3 {
- regulator-name = "ldo3";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo4 {
- regulator-name = "ldo4";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo5 {
- regulator-name = "ldo5";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo6 {
- regulator-name = "ldo6";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo7 {
- regulator-name = "ldo7";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo8 {
- regulator-name = "ldo8";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo9 {
- regulator-name = "ldo9";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo10 {
- regulator-name = "ldo10";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo11 {
- regulator-name = "ldo11";
- regulator-always-on = <1>;
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- bio {
- regulator-name = "bio";
- regulator-always-on = <1>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- };
- };
-
- tmp103: tmp103 at 71 {
- compatible = "ti,tmp103";
- reg = <0x71>;
- };
-};
-
-&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2>;
- status = "okay";
-};
-
-&i2c3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- status = "okay";
-
- expander: tca6416 at 20 {
- compatible = "ti,tca6416";
- reg = <0x20>;
- #gpio-cells = <2>;
- gpio-controller;
- };
-
- rtc at 68 {
- compatible = "dallas,m41t00";
- reg = <0x68>;
- };
-};
-
-&i2c4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c4>;
- status = "okay";
-
- eeprom at 50{
- compatible = "atmel,24c64";
- reg = <0x50>;
- };
-
- eeprom at 57{
- compatible = "atmel,24c64";
- reg = <0x57>;
+&gpio7 {
+ sd2_driver_ena {
+ gpio-hog;
+ output-high;
+ gpios = <8 GPIO_ACTIVE_HIGH>;
};
};
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
- phy-mode = "rgmii";
- phy-reset-gpios = <&gpio7 18 GPIO_ACTIVE_LOW>;
- txd0-skew-ps = <0>;
- txd1-skew-ps = <0>;
- txd2-skew-ps = <0>;
- txd3-skew-ps = <0>;
- status = "okay";
-};
-
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
status = "okay";
};
-&pcie {
- reset-gpio = <&gpio2 16 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&pwm1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm1>;
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- uart-has-rtscts;
- status = "okay";
-};
-
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
- status = "okay";
-};
-
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
- uart-has-rtscts;
- status = "okay";
-};
-
-&uart4 {
+&can1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart4>;
- status = "okay";
-};
-
-&usbh1 {
- vbus-supply = <®_usbh1_vbus>;
- dr_mode = "host";
+ pinctrl-0 = <&pinctrl_flexcan1>;
status = "okay";
};
-&usbotg {
- vbus-supply = <®_usbotg_vbus>;
+&can2 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbotg>;
- disable-over-current;
- dr_mode = "host";
+ pinctrl-0 = <&pinctrl_flexcan2>;
status = "okay";
};
@@ -366,18 +115,6 @@
};
&iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio>;
-
- pinctrl_audmux: audmux {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x1b0b0
- MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b0b0
- MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x1b0b0
- MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
- >;
- };
-
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
@@ -389,16 +126,6 @@
>;
};
- pinctrl_ecspi2: ecspi2grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
- MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
- MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
- MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 /* SS0# */
- MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x100b1 /* SS1# */
- >;
- };
-
pinctrl_ecspi4: ecspi4grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
@@ -406,72 +133,40 @@
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x100b1 /* SS0# */
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */
- MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 /* WP pin */
- >;
- };
-
- pinctrl_enet: enetgrp {
- fsl,pins = <
- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
- >;
- };
-
- pinctrl_flexcan1: flexcan1grp {
- fsl,pins = <
- MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0
- MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0
- >;
- };
-
- pinctrl_flexcan2: flexcan2grp {
- fsl,pins = <
- MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
- MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
+ MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x4001b0b0 /* WP pin */
>;
};
pinctrl_gpio: gpiogrp {
fsl,pins = <
/* led enable */
- MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
+ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0
/* LCD power enable */
- MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
+ MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x4001b0b0
/* led yellow */
- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
+ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x4001b0b0
/* led red */
- MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0
+ MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x4001b0b0
/* led green */
- MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b0
+ MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x4001b0b0
/* led blue */
- MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0
+ MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x4001b0b0
/* Profibus IRQ */
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
- /* FPGA IRQ */
+ /* FPGA IRQ currently unused*/
MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0
+ /* Display reset because of clock failure */
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b0
/* spi bus #2 SS driver enable */
- MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0
+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x4001b0b0
/* RST_LOC# PHY reset input (has pull-down!)*/
- MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x4001b0b0
/* USB_OTG_ID = GPIO1_24*/
- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x80000000
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x4001b0b0
/* Touchscreen IRQ */
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
/* PCIe reset */
- MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b0b0
+ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x4001b0b0
>;
};
@@ -495,71 +190,17 @@
>;
};
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
- MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
- >;
- };
-
- pinctrl_i2c2: i2c2grp {
- fsl,pins = <
- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
- >;
- };
-
- pinctrl_i2c3: i2c3grp {
- fsl,pins = <
- MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
- >;
- };
-
- pinctrl_i2c4: i2c4grp {
- fsl,pins = <
- MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
- MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
- >;
- };
-
- pinctrl_pwm1: pwm1grp {
- fsl,pins = <
- MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b0
- /* backlight enable */
- MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
- MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
- MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
- MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
- >;
- };
-
- pinctrl_uart2: uart2grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
- MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
- >;
- };
-
- pinctrl_uart3: uart3grp {
+ pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
- MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
- MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
- MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
- MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
+ MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0
+ MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0
>;
};
- pinctrl_uart4: uart4grp {
+ pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
+ MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
>;
};
@@ -569,14 +210,6 @@
>;
};
- pinctrl_aristainetos2_usbh1_vbus: aristainetos-usbh1-vbus {
- fsl,pins = <MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x130b0>;
- };
-
- pinctrl_aristainetos2_usbotg_vbus: aristainetos-usbotg-vbus {
- fsl,pins = <MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0>;
- };
-
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
@@ -601,7 +234,7 @@
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71
/* SD2 level shifter output enable */
- MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0
+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x4001b0b0
/* SD2 card detect input */
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
/* SD2 write protect input */
diff --git a/board/aristainetos/MAINTAINERS b/board/aristainetos/MAINTAINERS
index 91c8ae0738..2495cd4a37 100644
--- a/board/aristainetos/MAINTAINERS
+++ b/board/aristainetos/MAINTAINERS
@@ -4,6 +4,12 @@ S: Maintained
F: board/aristainetos/
F: include/configs/aristainetos2.h
F: configs/aristainetos2_defconfig
-F: arch/arm/dts/imx6dl-aristainetos2_4.dts
-F: arch/arm/dts/imx6dl-aristainetos2_7.dts
F: arch/arm/dts/imx6qdl-aristainetos2.dtsi
+F: arch/arm/dts/imx6qdl-aristainetos2-common.dtsi
+F: arch/arm/dts/imx6qdl-aristainetos2-u-boot.dtsi
+F: arch/arm/dts/imx6dl-aristainetos2_7.dts
+F: arch/arm/dts/imx6dl-aristainetos2_7.dtsi
+F: arch/arm/dts/imx6dl-aristainetos2_7-u-boot.dtsi
+F: arch/arm/dts/imx6dl-aristainetos2_4.dts
+F: arch/arm/dts/imx6dl-aristainetos2_4.dtsi
+F: arch/arm/dts/imx6dl-aristainetos2_4-u-boot.dtsi
diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c
index 11b64d08be..b296ea2522 100644
--- a/board/aristainetos/aristainetos.c
+++ b/board/aristainetos/aristainetos.c
@@ -31,6 +31,7 @@
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <pwm.h>
+#include <dm/root.h>
#include <env.h>
#include <micrel.h>
#include <spi.h>
@@ -82,6 +83,14 @@ DECLARE_GLOBAL_DATA_PTR;
#define SOFT_RESET_GPIO IMX_GPIO_NR(7, 13)
#define SD2_DRIVER_ENABLE IMX_GPIO_NR(7, 8)
+enum {
+ BOARD_TYPE_4 = 4,
+ BOARD_TYPE_7 = 7,
+};
+
+#define ARI_BT_4 "aristainetos2_4 at 2"
+#define ARI_BT_7 "aristainetos2_7 at 1"
+
struct i2c_pads_info i2c_pad_info3 = {
.scl = {
.i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC,
@@ -617,6 +626,7 @@ static void set_gpr_register(void)
&iomuxc_regs->gpr[12]);
}
+extern char __bss_start[], __bss_end[];
int board_early_init_f(void)
{
setup_iomux_uart();
@@ -626,6 +636,14 @@ int board_early_init_f(void)
gpio_direction_output(SD2_DRIVER_ENABLE, 1);
setup_display();
set_gpr_register();
+
+ /*
+ * clear bss here, so we can use spi driver
+ * before relocation and read Environment
+ * from spi flash.
+ */
+ memset(__bss_start, 0x00, __bss_end - __bss_start);
+
return 0;
}
@@ -704,6 +722,12 @@ int board_late_init(void)
CONFIG_LG4573_CS,
10000000, SPI_MODE_0);
+ /* set board_type */
+ if (gd->board_type == BOARD_TYPE_4)
+ env_set("board_type", ARI_BT_4);
+ else
+ env_set("board_type", ARI_BT_7);
+
return 0;
}
@@ -962,6 +986,50 @@ int board_ehci_power(int port, int on)
gpio_set_value(ARISTAINETOS_USB_OTG_PWR, on);
else
gpio_set_value(ARISTAINETOS_USB_H1_PWR, on);
+
+ return 0;
+}
+#endif
+
+int board_fit_config_name_match(const char *name)
+{
+ if (gd->board_type == BOARD_TYPE_4 &&
+ strchr(name, 0x34))
+ return 0;
+
+ if (gd->board_type == BOARD_TYPE_7 &&
+ strchr(name, 0x37))
+ return 0;
+
+ return -1;
+}
+
+static void do_board_detect(void)
+{
+ int ret;
+ char s[30];
+
+ /* default use board type 7 */
+ gd->board_type = BOARD_TYPE_7;
+ if (env_init())
+ return;
+
+ ret = env_get_f("panel", s, sizeof(s));
+ if (ret < 0)
+ return;
+
+ if (!strncmp("lg4573", s, 6))
+ gd->board_type = BOARD_TYPE_4;
+}
+
+#ifdef CONFIG_DTB_RESELECT
+int embedded_dtb_select(void)
+{
+ int rescan;
+
+ do_board_detect();
+ fdtdec_resetup(&rescan);
+
return 0;
}
#endif
diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig
index 4434d92e74..515f9a48a1 100644
--- a/configs/aristainetos2_defconfig
+++ b/configs/aristainetos2_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOUNCE_BUFFER=y
+CONFIG_BOARD_TYPES=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -42,7 +43,13 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2_4"
+CONFIG_OF_LIST="imx6dl-aristainetos2_4 imx6dl-aristainetos2_7"
+CONFIG_DTB_RESELECT=y
+CONFIG_MULTI_DTB_FIT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_SPI_EARLY=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_OFFSET_REDUND=0xE0000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
--
2.21.0
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