[U-Boot] [PATCH 3/4] rockchip: px5: enable spl-fifo-mode for emmc for px5-evb
Kever Yang
kever.yang at rock-chips.com
Sun Dec 1 15:00:03 CET 2019
On 2019/11/26 下午9:15, Andy Yan wrote:
> We need load some parts of ATF to sram, but rockchip
> dwmmc controllers can't do dma to non-ddr addresses
> space, so set the mmc controller into fifo mode in spl.
>
> Signed-off-by: Andy Yan <andy.yan at rock-chips.com>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
>
> arch/arm/dts/rk3368-px5-evb-u-boot.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
> index 002767a033..936ce55727 100644
> --- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
> +++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
> @@ -58,6 +58,8 @@
> };
>
> &emmc {
> + /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
> + u-boot,spl-fifo-mode;
> u-boot,dm-pre-reloc;
> };
>
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