[U-Boot] [PATCH v1 19/20] arm: socfpga: Bridge reset now invokes SMC calls to query FPGA config status

chee.hong.ang at intel.com chee.hong.ang at intel.com
Mon Dec 2 11:25:20 CET 2019


From: Chee Hong Ang <chee.hong.ang at intel.com>

Since SSBL is now running in non-secure mode (EL2), do_bridge_reset()
no longer send mailbox commands to SDM directly to query the status
of the FPGA configuration. Now, it invokes SMC service calls to ATF
(running at EL3) to perform the query.

Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
---
 arch/arm/mach-socfpga/misc_s10.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index 894753e..2bef4ec 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -17,6 +17,7 @@
 #include <asm/arch/misc.h>
 #include <asm/pl310.h>
 #include <linux/libfdt.h>
+#include <linux/intel-smc.h>
 #include <asm/arch/mailbox_s10.h>
 #include <asm/arch/secure_reg_helper.h>
 
@@ -154,10 +155,17 @@ void do_bridge_reset(int enable, unsigned int mask)
 {
 	/* Check FPGA status before bridge enable */
 	if (enable) {
-		int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS);
+		u64 arg = 1;
 
-		if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
-			ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS);
+		/* Send MBOX_RECONFIG_STATUS to SDM */
+		int ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE, NULL, 0,
+				 NULL, 0);
+
+		if (ret && ret != INTEL_SIP_SMC_FPGA_CONFIG_STATUS_BUSY) {
+			/* Send MBOX_CONFIG_STATUS to SDM */
+			ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE,
+					 &arg, 1, NULL, 0);
+		}
 
 		if (ret)
 			return;
-- 
2.7.4



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