[U-Boot] [PATCH v2 3/6] net: ti: am65-cpsw-nuss: Rework RX flow ID handling

[Grygorii Strashko]

On 02/12/2019 10:59, Vignesh Raghavendra wrote:
> Get flow ID information for RX DMA channel using dma_get_cfg() interface
> instead of reading from DT. This is required in order to avoid DT update
> whenever there is change in the range of flow ID allocated to the host.
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr at ti.com>
> Acked-by: Joe Hershberger <joe.hershberger at ni.com>
> ---
>   drivers/net/ti/am65-cpsw-nuss.c | 13 ++++---------
>   1 file changed, 4 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
> index 06b06639506a..2e14f4be862f 100644
> --- a/drivers/net/ti/am65-cpsw-nuss.c
> +++ b/drivers/net/ti/am65-cpsw-nuss.c
> @@ -99,7 +99,6 @@ struct am65_cpsw_common {
>   
>   	u32			port_num;
>   	struct am65_cpsw_port	ports[AM65_CPSW_CPSWNU_MAX_PORTS];
> -	u32			rflow_id_base;
>   
>   	struct mii_dev		*bus;
>   	u32			bus_freq;
> @@ -276,6 +275,7 @@ static int am65_cpsw_start(struct udevice *dev)
>   	struct am65_cpsw_common	*common = priv->cpsw_common;
>   	struct am65_cpsw_port *port = &common->ports[priv->port_id];
>   	struct am65_cpsw_port *port0 = &common->ports[0];
> +	struct ti_udma_drv_chan_cfg_data *dma_rx_cfg_data;
>   	int ret, i;
>   
>   	ret = power_domain_on(&common->pwrdmn);
> @@ -341,7 +341,8 @@ static int am65_cpsw_start(struct udevice *dev)
>   	writel(PKTSIZE_ALIGN, port0->port_base + AM65_CPSW_PN_RX_MAXLEN_REG);
>   
>   	/* set base flow_id */
> -	writel(common->rflow_id_base,
> +	dma_get_cfg(&common->dma_rx, 0, (void **)&dma_rx_cfg_data);
> +	writel(dma_rx_cfg_data->flow_id_base,
>   	       port0->port_base + AM65_CPSW_P0_FLOW_ID_REG);

Could you add dbg print here, hence you've dropped it below, pls?

>   
>   	/* Reset and enable the ALE */
> @@ -669,11 +670,6 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
>   				AM65_CPSW_CPSW_NU_ALE_BASE;
>   	cpsw_common->mdio_base = cpsw_common->ss_base + AM65_CPSW_MDIO_BASE;
>   
> -	cpsw_common->rflow_id_base = 0;
> -	cpsw_common->rflow_id_base =
> -			dev_read_u32_default(dev, "ti,rx-flow-id-base",
> -					     cpsw_common->rflow_id_base);
> -
>   	ports_np = dev_read_subnode(dev, "ports");
>   	if (!ofnode_valid(ports_np)) {
>   		ret = -ENOENT;
> @@ -761,12 +757,11 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
>   	if (ret)
>   		goto out;
>   
> -	dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u rflow_id_base:%u mdio_freq:%u\n",
> +	dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u mdio_freq:%u\n",
>   		 readl(cpsw_common->ss_base),
>   		 readl(cpsw_common->cpsw_base),
>   		 readl(cpsw_common->ale_base),
>   		 cpsw_common->port_num,
> -		 cpsw_common->rflow_id_base,
>   		 cpsw_common->bus_freq);
>   
>   out:
> 

-- 
Best regards,
grygorii