[U-Boot] [PATCH v2 5/6] arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT nodes
Grygorii Strashko
grygorii.strashko at ti.com
Mon Dec 2 12:40:40 CET 2019
On 02/12/2019 10:59, Vignesh Raghavendra wrote:
> Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking
> up on J721e EVM.
>
> Signed-off-by: Vignesh Raghavendra <vigneshr at ti.com>
> Acked-by: Joe Hershberger <joe.hershberger at ni.com>
> ---
> .../k3-j721e-common-proc-board-u-boot.dtsi | 239 ++++++++++++++++++
> 1 file changed, 239 insertions(+)
>
> diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> index 541da22c4889..f3857b9100bb 100644
> --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> @@ -3,11 +3,18 @@
> * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
> */
>
> +#include <dt-bindings/dma/k3-udma.h>
> +#include <dt-bindings/net/ti-dp83867.h>
> +
> / {
> chosen {
> stdout-path = "serial2:115200n8";
> tick-timer = &timer1;
> };
> +
> + aliases {
> + ethernet0 = &cpsw_port1;
> + };
> };
>
> &cbass_main{
> @@ -24,6 +31,184 @@
> clock-frequency = <25000000>;
> u-boot,dm-spl;
> };
> +
[...]
> +&davinci_mdio {
> + phy0: ethernet-phy at 0 {
> + reg = <0>;
> + /* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
Could you drop this TODO pls?
> + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> + };
> +};
> +
> +&cpsw_port1 {
> + phy-mode = "rgmii-rxid";
> + phy-handle = <&phy0>;
> +};
> +
> +&mcu_cpsw {
> + reg = <0x0 0x46000000 0x0 0x200000>,
> + <0x0 0x40f00200 0x0 0x2>;
> + reg-names = "cpsw_nuss", "mac_efuse";
> +
> + cpsw-phy-sel at 40f04040 {
> + compatible = "ti,am654-cpsw-phy-sel";
> + reg= <0x0 0x40f04040 0x0 0x4>;
> + reg-names = "gmii-sel";
> + };
> +};
>
--
Best regards,
grygorii
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