[U-Boot] [PATCH] spi: cadence_qspi_apb: fix QSPI write issues

Simon Goldschmidt simon.k.r.goldschmidt at gmail.com
Mon Dec 2 22:01:47 CET 2019


Am 22.11.2019 um 03:03 schrieb Tan, Ley Foon:
> 
> 
>> -----Original Message-----
>> From: Ooi, Joyce <joyce.ooi at intel.com>
>> Sent: Thursday, November 21, 2019 10:42 PM
>> To: Jagan Teki <jagan at amarulasolutions.com>
>> Cc: Tan, Ley Foon <ley.foon.tan at intel.com>; Ang, Chee Hong
>> <chee.hong.ang at intel.com>; Ooi, Joyce <joyce.ooi at intel.com>; u-
>> boot at lists.denx.de
>> Subject: [PATCH] spi: cadence_qspi_apb: fix QSPI write issues
>>
>> From: Chee Hong Ang <chee.hong.ang at intel.com>
>>
>> QSPI driver perform chip select on every flash read/write access. The driver
>> need to disable/enable the QSPI controller while performing chip select. This
>> may cause some data lost especially the QSPI controller is configured to run
>> at slower speed as it may take longer time to access the flash device.
>> This patch prevent the driver from disable/enable the QSPI controller too
>> soon and inadvertently halting any ongoing flash read/write access by
>> ensuring the QSPI controller is always in idle mode after each read/write
>> access.
>>
>> Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
>> Signed-off-by: Ooi, Joyce <joyce.ooi at intel.com>
> 
> Reviewed-by: Ley Foon Tan <ley.foon.tan at intel.com>

Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>

> 
>> ---
>>   drivers/spi/cadence_qspi_apb.c | 9 +++++++++
>>   1 file changed, 9 insertions(+)
>>
>> diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
>> index 55a7501..ab14a5f 100644
>> --- a/drivers/spi/cadence_qspi_apb.c
>> +++ b/drivers/spi/cadence_qspi_apb.c
>> @@ -676,6 +676,10 @@ int
>> cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
>>   	writel(CQSPI_REG_INDIRECTRD_DONE,
>>   	       plat->regbase + CQSPI_REG_INDIRECTRD);
>>
>> +	/* Wait til QSPI is idle */
>> +	if (!cadence_qspi_wait_idle(plat->regbase))
>> +		return -EIO;
>> +
>>   	return 0;
>>
>>   failrd:
>> @@ -782,6 +786,11 @@ int
>> cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata
>> *plat,
>>   	       plat->regbase + CQSPI_REG_INDIRECTWR);
>>   	if (bounce_buf)
>>   		free(bounce_buf);
>> +
>> +	/* Wait til QSPI is idle */
>> +	if (!cadence_qspi_wait_idle(plat->regbase))
>> +		return -EIO;
>> +
>>   	return 0;
>>
>>   failwr:
>> --
>> 1.9.1
> 
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