[v3 5/8] dm: ls1012a: add i2c DM support

Priyanka Jain priyanka.jain at nxp.com
Thu Dec 5 07:48:49 CET 2019



>-----Original Message-----
>From: Biwen Li <biwen.li at nxp.com>
>Sent: Thursday, December 5, 2019 11:41 AM
>To: Jagdish Gediya <jagdish.gediya at nxp.com>; Priyanka Jain
><priyanka.jain at nxp.com>; hs at denx.de; jagan at amarulasolutions.com;
>aford173 at gmail.com; Alison Wang <alison.wang at nxp.com>;
>bhaskar.upadhaya at nxp.com; feng.li_2 at nxp.com; jh80.chung at samsung.com;
>Pramod Kumar <pramod.kumar_1 at nxp.com>; Rajesh Bhagat
><rajesh.bhagat at nxp.com>; Ruchika Gupta <ruchika.gupta at nxp.com>;
>olteanv at gmail.com
>Cc: Xiaobo Xie <xiaobo.xie at nxp.com>; Jiafei Pan <jiafei.pan at nxp.com>; u-
>boot at lists.denx.de; Biwen Li <biwen.li at nxp.com>
>Subject: [v3 5/8] dm: ls1012a: add i2c DM support
>
>This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A
>
>Signed-off-by: Biwen Li <biwen.li at nxp.com>
>---
>Changes in v3:
>	- none
>
>Changes in v2:
>	- merge some patches to one patch
>
> arch/arm/include/asm/gpio.h                   |   1 +
> board/freescale/ls1012aqds/ls1012aqds.c       |  20 ++-
> board/freescale/ls1012ardb/eth.c              |  35 +++++
> board/freescale/ls1012ardb/ls1012ardb.c       | 147 +++++++++++++++---
> configs/ls1012a2g5rdb_qspi_defconfig          |   3 +
> configs/ls1012a2g5rdb_tfa_defconfig           |   3 +
> configs/ls1012afrdm_qspi_defconfig            |   3 +
> configs/ls1012afrdm_tfa_defconfig             |   3 +
> .../ls1012afrwy_qspi_SECURE_BOOT_defconfig    |   3 +
> configs/ls1012afrwy_qspi_defconfig            |   3 +
> configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig |   3 +
> configs/ls1012afrwy_tfa_defconfig             |   3 +
> configs/ls1012aqds_qspi_defconfig             |   3 +
> configs/ls1012aqds_tfa_SECURE_BOOT_defconfig  |   3 +
> configs/ls1012aqds_tfa_defconfig              |   3 +
> configs/ls1012ardb_qspi_SECURE_BOOT_defconfig |   3 +
> configs/ls1012ardb_qspi_defconfig             |   3 +
> configs/ls1012ardb_tfa_SECURE_BOOT_defconfig  |   3 +
> configs/ls1012ardb_tfa_defconfig              |   3 +
> include/configs/ls1012a_common.h              |   5 +
> 20 files changed, 227 insertions(+), 26 deletions(-)
>
>diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
>index 6ff5f42424..9f8c9da564 100644
>--- a/arch/arm/include/asm/gpio.h
>+++ b/arch/arm/include/asm/gpio.h
>@@ -3,6 +3,7 @@
> 	!defined(CONFIG_ARCH_BCM63158) &&
>!defined(CONFIG_ARCH_ROCKCHIP) && \
> 	!defined(CONFIG_ARCH_LX2160A) &&
>!defined(CONFIG_ARCH_LS1028A) && \
> 	!defined(CONFIG_ARCH_LS2080A) &&
>!defined(CONFIG_ARCH_LS1088A) && \
>+	!defined(CONFIG_ARCH_LS1012A) && \
> 	!defined(CONFIG_ARCH_ASPEED)
> #include <asm/arch/gpio.h>
> #endif
>diff --git a/board/freescale/ls1012aqds/ls1012aqds.c
>b/board/freescale/ls1012aqds/ls1012aqds.c
>index 86c72ee357..30bf1047d5 100644
>--- a/board/freescale/ls1012aqds/ls1012aqds.c
>+++ b/board/freescale/ls1012aqds/ls1012aqds.c
>@@ -107,10 +107,26 @@ int board_early_init_f(void)  int misc_init_r(void)  {
> 	u8 mux_sdhc_cd = 0x80;
>-
>-	i2c_set_bus_num(0);
>+	int bus_num = 0;
>+
>+#ifdef CONFIG_DM_I2C
>+	struct udevice *dev;
>+	int ret;
>+
>+	ret = i2c_get_chip_for_busnum(bus_num,
>CONFIG_SYS_I2C_FPGA_ADDR,
>+				      1, &dev);
>+	if (ret) {
>+		printf("%s: Cannot find udev for a bus %d\n", __func__,
>+		       bus_num);
>+		return ret;
>+	}
>+	dm_i2c_write(dev, 0x5a, &mux_sdhc_cd, 1); #else
>+	i2c_set_bus_num(bus_num);
>
> 	i2c_write(CONFIG_SYS_I2C_FPGA_ADDR, 0x5a, 1, &mux_sdhc_cd, 1);
>+#endif
>+
> 	return 0;
> }
> #endif
>diff --git a/board/freescale/ls1012ardb/eth.c
>b/board/freescale/ls1012ardb/eth.c
>index b35d5343e4..0f33128996 100644
>--- a/board/freescale/ls1012ardb/eth.c
>+++ b/board/freescale/ls1012ardb/eth.c
>@@ -27,12 +27,47 @@ static inline void ls1012ardb_reset_phy(void)  {  #ifdef
>CONFIG_TARGET_LS1012ARDB
> 	/* Through reset IO expander reset both RGMII and SGMII PHYs */
>+#ifdef CONFIG_DM_I2C
>+	struct udevice *dev;
>+	int ret;
>+
>+	/*
>+	 * The I2C IO-expander PCAL9555A is mouted on I2C1 bus(bus number
>is 0).
>+	 */
>+	ret = i2c_get_chip_for_busnum(0, I2C_MUX_IO2_ADDR,
>+				      1, &dev);
>+	if (ret) {
>+		printf("%s: Cannot find udev for a bus %d\n", __func__,
>+		       0);
>+		return;
>+	}
>+	/* Config port 0
>+	 * - config pin IOXP_RST_ETH1_B and IOXP_RST_ETH2_B
>+	 *   are enabled as an output.
>+	 */
>+	dm_i2c_reg_write(dev, 6, __PHY_MASK);
>+
>+	/*
>+	 * Set port 0 output a value to reset ETH2 interface
>+	 * - pin IOXP_RST_ETH2_B output 0b0
>+	 */
>+	dm_i2c_reg_write(dev, 2, __PHY_ETH2_MASK);
>+	mdelay(10);
>+	dm_i2c_reg_write(dev, 2, __PHY_ETH1_MASK);
>+	/*
>+	 * Set port 0 output a value to reset ETH1 interface
>+	 * - pin IOXP_RST_ETH1_B output 0b0
>+	 */
>+	mdelay(10);
>+	dm_i2c_reg_write(dev, 2, 0xFF);
>+#else
> 	i2c_reg_write(I2C_MUX_IO2_ADDR, 6, __PHY_MASK);
> 	i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH2_MASK);
> 	mdelay(10);
> 	i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH1_MASK);
> 	mdelay(10);
> 	i2c_reg_write(I2C_MUX_IO2_ADDR, 2, 0xFF);
>+#endif
> 	mdelay(50);
> #endif
> }
>diff --git a/board/freescale/ls1012ardb/ls1012ardb.c
>b/board/freescale/ls1012ardb/ls1012ardb.c
>index e4527c19b8..271227a976 100644
>--- a/board/freescale/ls1012ardb/ls1012ardb.c
>+++ b/board/freescale/ls1012ardb/ls1012ardb.c
>@@ -32,13 +32,27 @@ int checkboard(void)  {  #ifdef
>CONFIG_TARGET_LS1012ARDB
> 	u8 in1;
>+	int ret, bus_num = 0;
>
> 	puts("Board: LS1012ARDB ");
>
> 	/* Initialize i2c early for Serial flash bank information */
>-	i2c_set_bus_num(0);
>+#if defined(CONFIG_DM_I2C)
>+	struct udevice *dev;
>
>-	if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1) < 0) {
>+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR,
>+				      1, &dev);
>+	if (ret) {
>+		printf("%s: Cannot find udev for a bus %d\n", __func__,
>+		       bus_num);
>+		return -ENXIO;
>+	}
>+	ret = dm_i2c_read(dev, I2C_MUX_IO_1, &in1, 1); #else /* Non DM I2C
>+support - will be removed */
>+	i2c_set_bus_num(bus_num);
>+	ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1); #endif
>+	if (ret < 0) {
> 		printf("Error reading i2c boot information!\n");
> 		return 0; /* Don't want to hang() on this error */
> 	}
>@@ -173,11 +187,25 @@ int esdhc_status_fixup(void *blob, const char
>*compat)
> 	bool sdhc2_en = false;
> 	u8 mux_sdhc2;
> 	u8 io = 0;
>+	int ret, bus_num = 0;
>
>-	i2c_set_bus_num(0);
>+#if defined(CONFIG_DM_I2C)
>+	struct udevice *dev;
>
>+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR,
>+				      1, &dev);
>+	if (ret) {
>+		printf("%s: Cannot find udev for a bus %d\n", __func__,
>+		       bus_num);
>+		return -ENXIO;
>+	}
>+	ret = dm_i2c_read(dev, I2C_MUX_IO_1, &io, 1); #else
>+	i2c_set_bus_num(bus_num);
> 	/* IO1[7:3] is the field of board revision info. */
>-	if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1) < 0) {
>+	ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1); #endif
>+	if (ret < 0) {
> 		printf("Error reading i2c boot information!\n");
> 		return 0;
> 	}
>@@ -200,7 +228,12 @@ int esdhc_status_fixup(void *blob, const char
>*compat)
> 		 *	10 - eMMC Memory
> 		 *	11 - SPI
> 		 */
>-		if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1) < 0)
>{
>+#if defined(CONFIG_DM_I2C)
>+		ret = dm_i2c_read(dev, I2C_MUX_IO_0, &io, 1); #else
>+		ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1);
>#endif
>+		if (ret < 0) {
> 			printf("Error reading i2c boot information!\n");
> 			return 0;
> 		}
>@@ -231,16 +264,63 @@ int ft_board_setup(void *blob, bd_t *bd)
>
> static int switch_to_bank1(void)
> {
>-	u8 data;
>-	int ret;
>+	u8 data = 0xf4, chip_addr = 0x24, offset_addr = 0x03;
>+	int ret, bus_num = 0;
>
>-	i2c_set_bus_num(0);
>+#if defined(CONFIG_DM_I2C)
>+	struct udevice *dev;
>+
>+	ret = i2c_get_chip_for_busnum(bus_num, chip_addr,
>+				      1, &dev);
>+	if (ret) {
>+		printf("%s: Cannot find udev for a bus %d\n", __func__,
>+		       bus_num);
>+		return -ENXIO;
>+	}
>+	/*
>+	 * --------------------------------------------------------------------------------
>+	 * | I2C bus |   I2C address    |       Device     |          Notes               |
>+	 * --------------------------------------------------------------------------------
>+	 * |  I2C1   | 0x24, 0x25, 0x26 | IO expander (CFG,| Provides 16bits of
>General   |
>+	 * |	     |		        | RESET, and INT/  | Purpose parallel
>Input/Output|
>+	 * |         |			| KW41GPIO) - NXP  | (GPIO)
>expansion for the     |
>+	 * |         |                  | PCAL9555AHF      | I2C bus                      |
>+	 * --------------------------------------------------------------------------------
>+	 * - mount three IO expander(PCAL9555AHF) on I2C1
>+	 *
>+	 * PCAL9555A device address
>+	 *  		slave address
>+	 *  --------------------------------------
>+	 *  | 0 | 1 | 0 | 0 | A2 | A1 | A0 | R/W |
>+	 *  --------------------------------------
>+	 *  |     fixed     | hardware selectable|
>+	 *
>+	 * Output port 1(Pinter register bits = 0x03)
>+	 *
>+	 * P1_[7~0] = 0xf4
>+	 * P1_0 <---> CFG_MUX_QSPI_S0
>+	 * P1_1 <---> CFG_MUX_QSPI_S1
>+	 * CFG_MUX_QSPI_S[1:0] = 0b00
>+	 *
>+	 * QSPI chip-select demultiplexer select
>+	 * ----------------------------------------------------------------------------
>+	 * | CFG_MUX_QSPI_S1 | CFG_MUX_QSPI_S0 |              Values
>|
>+	 * ---------------------------------------------------------------------------
>+	 * | 0               | 0               |CS routed to SPI memory bank1(default)|
>+	 * ----------------------------------------------------------------------------
>+	 * | 0               | 1               |CS routed to SPI memory bank2         |
>+	 * ----------------------------------------------------------------------------
>+	 *
>+	 */
>+	ret = dm_i2c_write(dev, offset_addr, &data, 1); #else /* Non DM I2C
>+support - will be removed */
>+	i2c_set_bus_num(bus_num);
>+	ret = i2c_write(chip_addr, offset_addr, 1, &data, 1); #endif
>
>-	data = 0xf4;
>-	ret = i2c_write(0x24, 0x3, 1, &data, 1);
> 	if (ret) {
> 		printf("i2c write error to chip : %u, addr : %u, data : %u\n",
>-		       0x24, 0x3, data);
>+		       chip_addr, offset_addr, data);
> 	}
>
> 	return ret;
>@@ -248,25 +328,44 @@ static int switch_to_bank1(void)
>
> static int switch_to_bank2(void)
> {
>-	u8 data;
>-	int ret;
>+	u8 data[2] = {0xfc, 0xf5}, offset_addr[2] = {0x7, 0x3}, chip_addr = 0x24;
>+	int ret, i, bus_num = 0;
>
>-	i2c_set_bus_num(0);
>+#if defined(CONFIG_DM_I2C)
>+	struct udevice *dev;
>
>-	data = 0xfc;
>-	ret = i2c_write(0x24, 0x7, 1, &data, 1);
>+	ret = i2c_get_chip_for_busnum(bus_num, chip_addr,
>+				      1, &dev);
> 	if (ret) {
>-		printf("i2c write error to chip : %u, addr : %u, data : %u\n",
>-		       0x24, 0x7, data);
>-		goto err;
>+		printf("%s: Cannot find udev for a bus %d\n", __func__,
>+		       bus_num);
>+		return -ENXIO;
> 	}
>+#else /* Non DM I2C support - will be removed */
>+	i2c_set_bus_num(bus_num);
>+#endif
>
>-	data = 0xf5;
>-	ret = i2c_write(0x24, 0x3, 1, &data, 1);
>-	if (ret) {
>-		printf("i2c write error to chip : %u, addr : %u, data : %u\n",
>-		       0x24, 0x3, data);
>+	/*
>+	 * 1th step: config port 1
>+	 *	- the port 1 pin is enabled as an output
>+	 * 2th step: output port 1
>+	 *	- P1_[7:0] output 0xf5,
>+	 *	  then CFG_MUX_QSPI_S[1:0] equal to 0b01,
>+	 *	  CS routed to SPI memory bank2
>+	 */
>+	for (i = 0; i < sizeof(data); i++) {
>+#if defined(CONFIG_DM_I2C)
>+		ret = dm_i2c_write(dev, offset_addr[i], &data[i], 1); #else /*
>Non DM
>+I2C support - will be removed */
>+		ret = i2c_write(chip_addr, offset_addr[i], 1, &data[i], 1); #endif
>+		if (ret) {
>+			printf("i2c write error to chip : %u, addr : %u, data :
>%u\n",
>+			       chip_addr, offset_addr[i], data[i]);
>+			goto err;
>+		}
> 	}
>+
> err:
> 	return ret;
> }
>diff --git a/configs/ls1012a2g5rdb_qspi_defconfig
>b/configs/ls1012a2g5rdb_qspi_defconfig
>index 3c99a43ded..82dd98bed6 100644
>--- a/configs/ls1012a2g5rdb_qspi_defconfig
>+++ b/configs/ls1012a2g5rdb_qspi_defconfig
>@@ -52,3 +52,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012a2g5rdb_tfa_defconfig
>b/configs/ls1012a2g5rdb_tfa_defconfig
>index 0865ac2fdf..9f9cf5a15b 100644
>--- a/configs/ls1012a2g5rdb_tfa_defconfig
>+++ b/configs/ls1012a2g5rdb_tfa_defconfig
>@@ -52,3 +52,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012afrdm_qspi_defconfig
>b/configs/ls1012afrdm_qspi_defconfig
>index 7ff0955f1d..9f5d1ebf2d 100644
>--- a/configs/ls1012afrdm_qspi_defconfig
>+++ b/configs/ls1012afrdm_qspi_defconfig
>@@ -52,3 +52,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012afrdm_tfa_defconfig
>b/configs/ls1012afrdm_tfa_defconfig
>index 8e8ddd73ed..f6fd69bf45 100644
>--- a/configs/ls1012afrdm_tfa_defconfig
>+++ b/configs/ls1012afrdm_tfa_defconfig
>@@ -52,3 +52,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
>b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
>index a1c7c702d1..04d3d48687 100644
>--- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
>+++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
>@@ -54,3 +54,6 @@ CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
> CONFIG_RSA=y
> CONFIG_RSA_SOFTWARE_EXP=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012afrwy_qspi_defconfig
>b/configs/ls1012afrwy_qspi_defconfig
>index 0773857c51..0f007dc384 100644
>--- a/configs/ls1012afrwy_qspi_defconfig
>+++ b/configs/ls1012afrwy_qspi_defconfig
>@@ -54,3 +54,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
>b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
>index 79eb801b03..f33ae350bf 100644
>--- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
>+++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
>@@ -54,3 +54,6 @@ CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
> CONFIG_RSA=y
> CONFIG_RSA_SOFTWARE_EXP=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012afrwy_tfa_defconfig
>b/configs/ls1012afrwy_tfa_defconfig
>index 354c521ea4..ee1f2e13f0 100644
>--- a/configs/ls1012afrwy_tfa_defconfig
>+++ b/configs/ls1012afrwy_tfa_defconfig
>@@ -56,3 +56,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012aqds_qspi_defconfig
>b/configs/ls1012aqds_qspi_defconfig
>index 0a719c30c5..958d78fd23 100644
>--- a/configs/ls1012aqds_qspi_defconfig
>+++ b/configs/ls1012aqds_qspi_defconfig
>@@ -76,3 +76,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
>b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
>index 25d06d2919..2ae7e9eda9 100644
>--- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
>+++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
>@@ -68,3 +68,6 @@ CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
> CONFIG_RSA=y
> CONFIG_RSA_SOFTWARE_EXP=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012aqds_tfa_defconfig
>b/configs/ls1012aqds_tfa_defconfig
>index bde53a420c..373ced798d 100644
>--- a/configs/ls1012aqds_tfa_defconfig
>+++ b/configs/ls1012aqds_tfa_defconfig
>@@ -76,3 +76,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
>b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
>index 9989f7b3e9..d3e762df0a 100644
>--- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
>+++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
>@@ -57,3 +57,6 @@ CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
> CONFIG_RSA=y
> CONFIG_RSA_SOFTWARE_EXP=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012ardb_qspi_defconfig
>b/configs/ls1012ardb_qspi_defconfig
>index 80ca9bd577..78ccd1bcfe 100644
>--- a/configs/ls1012ardb_qspi_defconfig
>+++ b/configs/ls1012ardb_qspi_defconfig
>@@ -59,3 +59,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
>b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
>index 8eb71fcf63..ae7dcd19c7 100644
>--- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
>+++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
>@@ -57,3 +57,6 @@ CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
> CONFIG_RSA=y
> CONFIG_RSA_SOFTWARE_EXP=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/configs/ls1012ardb_tfa_defconfig
>b/configs/ls1012ardb_tfa_defconfig
>index 1cc358ce74..17fe571765 100644
>--- a/configs/ls1012ardb_tfa_defconfig
>+++ b/configs/ls1012ardb_tfa_defconfig
>@@ -60,3 +60,6 @@ CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
>+CONFIG_DM_I2C=y
>+CONFIG_DM_GPIO=y
>+CONFIG_DM_RTC=y
>diff --git a/include/configs/ls1012a_common.h
>b/include/configs/ls1012a_common.h
>index 2579e2fb37..e9baa2a8b6 100644
>--- a/include/configs/ls1012a_common.h
>+++ b/include/configs/ls1012a_common.h
>@@ -66,7 +66,12 @@
> 						CONFIG_SYS_SCSI_MAX_LUN)
>
> /* I2C */
>+#ifndef CONFIG_DM_I2C
> #define CONFIG_SYS_I2C
>+#else
>+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
>+#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 #endif
>
> #define CONFIG_SYS_NS16550_SERIAL
> #define CONFIG_SYS_NS16550_REG_SIZE     1
>--
>2.17.1
Reviewed-by: Priyanka Jain <priyanka.jain at nxp.com>


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