[PATCH v6 028/102] x86: Reduce mrccache record alignment size

Bin Meng bmeng.cn at gmail.com
Sun Dec 8 03:53:28 CET 2019


On Sat, Dec 7, 2019 at 12:47 PM Simon Glass <sjg at chromium.org> wrote:
>
> At present the records are 4KB in size. This is unnecessarily large when
> the SPI-flash erase size is 256 bytes. Reduce it so it will be more
> efficient with Apollo Lake's 24-byte variable-data record.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
>
> ---
>
> Changes in v6: None
> Changes in v5: None
> Changes in v4:
> - apollolake -> Apollo Lake
>
> Changes in v3: None
> Changes in v2: None
>
>  arch/x86/include/asm/mrccache.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

applied to u-boot-x86/next, thanks!


More information about the U-Boot mailing list