Re: rk3328-firefly ddr4 tpl init【请注意，邮件由linux-rockchip-bounces+kever.yang=rock-chips.com at lists.infradead.org代发】

[Kever Yang]

Hi Peter,

On 2019/12/5 上午10:19, Peter Geis wrote:
> Good Evening,
>
> I am trying to get TPL/SPL working on the rk3328-firefly ddr4 4gb board.
> I've pulled the ddr4 dtsi from the rockchip u-boot repository [0].
>
> Unfortunately I cannot get the ddr4 to detect correctly.


Yes, the ddr4 support for rk3328 is missing now, we will update it some 
time later.


Thanks,

- Kever

>
> With the u-boot tpl, I get the following:
> U-Boot TPL 2020.01-rc3-00072-g1a1bea82b2-dirty (Dec 04 2019 - 08:33:54)
> data training error
> row errordata training error
> DDR4, 333MHz
> BW=16 Col=10 Bk=4 BG=2 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
>
> With the rk3328_ddr_333MHz_v1.16.bin, I get the following:
> DDR version 1.16 20190528
> ID:0x805 N
> In
> DDR4
> 333MHz
> Bus Width=32 Col=10 Bank=4 Bank Group=2 Row=16/16 CS=2 Die
> Bus-Width=16 Size=4096MB
> ddrconfig:19
> OUT
>
> [0] https://github.com/rockchip-linux/u-boot/blob/next-dev/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
>
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