Issue with mmc command set

Amarnath MB amarnath.mb at mistralsolutions.com
Fri Dec 13 18:15:52 CET 2019


Hi All,

I working on a T1042 based custom board that has an on-board eMMC (8GB,
GLS85VM1008A-M-I-LFWE-ND202).
I have successfully booted uboot 2019.07 on my board.

I'm facing an issue with mmc command set, when I issue an 'mmc list'
command once the board boots up it lists " FSL_SDHC: 0 " and 'mmc info'
lists the details of my eMMC.

Once I issue 'mmc dev 0 0' command, then nothing is printed on my console.
After this when I issue 'mmc info' it also prints nothing on the console.
But 'mmc list' still lists the " FSL_SDHC: 0 ".

Why is it so? Am I doing something wrong?

Please the below u-boot log for detail.

Regards,
Amarnath MB

U-Boot 2019.07 (Dec 13 2019 - 21:37:11 +0530)

CPU0:  T1042E, Version: 1.1, (0x85280211)
Core:  e5500, Version: 2.1, (0x80241021)
Clock Configuration:
       CPU0:1200 MHz, CPU1:1200 MHz, CPU2:1200 MHz, CPU3:1200 MHz,
       CCB:500  MHz,
       DDR:533.333 MHz (1066.667 MT/s data rate) (Asynchronous),
       IFC:250  MHz
       QE :250  MHz
       FMAN1: 500 MHz
       QMAN:  250 MHz
       PME:   250 MHz
L1:    D-cache 32 KiB enabled
       I-cache 32 KiB enabled
Reset Configuration Word (RCW):
       00000000: 0a10000c 0c000000 00000000 00000000
       00000010: 06000002 c0000002 ec027000 01000000
       00000020: 00000000 00010001 60000000 00028000
       00000030: 00000200 00165005 00000000 00000000
Board: T1042
I2C:   ready
DRAM:  Initializing DDR....
Configuring DDR for 1066.667 MT/s data rate
Setting DDR register values...
Setting DDR register values finished...
2 GiB left unmapped
SDRAM test phase 1:
SDRAM test phase 2:
SDRAM test passed.
2 GiB (DDR4, 64-bit, CL=11, ECC on)
Flash: 512 MiB
L2:    256 KiB enabled
Corenet Platform Cache: 256 KiB enabled
Using SERDES1 Protocol: 6 (0x6)
Enabling all cpus
MMC:   FSL_SDHC: 0
Loading User and Factory Environments...

*** Warning - FACTORY ENVIRONMENT bad CRC, using default factory environment

Firmware 'Microcode version 0.0.1 for T1040 r1.0' for 1040 V1.0
QE: uploading microcode 'Microcode for T1040 r1.0' version 0.0.1
In:    serial
Out:   serial
Err:   serial
SERDES Reference : 0x6
Temperature init Done

*** Warning - U-boot image is Updated

Net:   Initializing Fman
Fman1: Uploading microcode version 106.4.18
FM1 at DTSEC4, FM1 at DTSEC5 [PRIME]
POST vid Perform VMON POST
au16Voltage[0] = 0xcc6 = 997350 µV
au16Voltage[1] = 0xcc9 = 998265 µV
au16Voltage[2] = 0xf63 = 1201395 µV
au16Voltage[3] = 0x115d = 1355725 µV
au16Voltage[4] = 0x1716 = 1802550 µV
au16Voltage[5] = 0x1fe8 = 2491240 µV
au16Voltage[6] = 0x2a80 = 3318400 µV
au16Voltage[7] = 0x7c6 = 606950 µV
PASSED
POST i2c PASSED
POST rtc Sun Jan  1 2020 00:00:00
PASSED
POST ethernet PASSED
POST flash PASSED
Hit any key to stop autoboot:  0
T1042 #
T1042 # mmc list
FSL_SDHC: 0
T1042 # mmc info
Device: FSL_SDHC
Manufacturer ID: f8
OEM: 100
Name: VM010
Bus Speed: 52000000
Mode: MMC High Speed (52MHz)
Rd Block Len: 512
MMC version 4.4.1
High Capacity: Yes
Capacity: 7.3 GiB
Bus Width: 4-bit
Erase Group Size: 4 MiB
Enhanced Mode: Disabled
HC WP Group Size: 8 MiB
User Capacity: 7.3 GiB
Boot Capacity: 512 KiB ENH
RPMB Capacity: 512 KiB ENH
T1042 #
T1042 # mmc part
## Unknown partition table type 0
T1042 # mmc dev 0 0
T1042 # mmc info
T1042 # mmc list
FSL_SDHC: 0
T1042 #


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