mtk_sd on Vocore2 board

[Mauro Condarelli]

I am having trouble understanding how to handle SD driver on my Vocore2
board.

I already managed to make it work under Linux (5.3.0).
Root problem is VoCore2 has no support for power switching on the SD/MMC
slot;
a direct wire goes directly to the 3.3V supply.

Similar issue for the clock (here I needed a very ugly patch (below)).

Questions are twofold:
1) Is this really needed (on mainstream kernel) or did I miss some DT
setting that would have achieved the same effect?
2) How to achieve equivalent effect on U-Boot .../mtk_sd.c which looks
very different from the above?

If I do a "naive" porting SD will NOT work; any commands (e.g.: "mmc
info") results in error: "mmc_init: -95, time 6201"
(curiously always with the same "time") which I *think* I traced to
inability to handle voltage changes.

Any hint would be very welcome.

Regards and
Merry Christmas and very Happy New Year!
Mauro

=========================================================================
>From 3d239054fd01fbeb03863eee7eefd2a76b82dc02 Mon Sep 17 00:00:00 2001
From: Mauro Condarelli <mc5686 at mclink.it>
Date: Wed, 18 Sep 2019 14:07:22 +0200
Subject: [PATCH 8/8] MIPS, MMC, VoCore2: Preliminary fix for mtk-sd

---
 arch/mips/boot/dts/ralink/mt7628a.dtsi | 37 ++++++++++++++++++++++++++
 arch/mips/boot/dts/ralink/vocore2.dts  |  4 +++
 arch/mips/ralink/clk.c                 |  2 +-
 drivers/mmc/host/mtk-sd.c              |  8 ++++++
 4 files changed, 50 insertions(+), 1 deletion(-)

diff --git a/arch/mips/boot/dts/ralink/mt7628a.dtsi
b/arch/mips/boot/dts/ralink/mt7628a.dtsi
index 376536489415..9636709edc5d 100644
--- a/arch/mips/boot/dts/ralink/mt7628a.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7628a.dtsi
@@ -259,6 +259,43 @@
         reset-names = "host", "device";
     };
 
+    clk48m: clk48m at 0 {
+        compatible = "fixed-clock";
+        clock-frequency = <48000000>;
+        #clock-cells = <0>;
+    };
+
+    vmmcsd_fixed: fixedregulator at 0 {
+        compatible = "regulator-fixed";
+        regulator-name = "vmmcsd_fixed";
+        regulator-min-microvolt = <3300000>;
+        regulator-max-microvolt = <3300000>;
+    };
+
+    mmc: mmc at 10130000 {
+        compatible = "mediatek,mt7620-mmc";
+        reg = <0x10130000 0x4000>;
+        builtin-cd = <1>;
+        r_smpl = <1>;
+
+        interrupt-parent = <&intc>;
+        interrupts = <14>;
+
+        clocks = <&clk48m>, <&clk48m>;
+        clock-names = "source", "hclk";
+
+        pinctrl-names = "default", "state_uhs";
+        pinctrl-0 = <&pinmux_sdmode_sdxc>;
+        pinctrl-1 = <&pinmux_sdmode_sdxc>;
+
+        vmmc-supply = <&vmmcsd_fixed>;
+        vqmmc-supply = <&vmmcsd_fixed>;
+
+        resets = <&resetc 30>;
+
+        status = "disabled";
+    };
+
     ehci at 101c0000 {
         compatible = "generic-ehci";
         reg = <0x101c0000 0x1000>;
diff --git a/arch/mips/boot/dts/ralink/vocore2.dts
b/arch/mips/boot/dts/ralink/vocore2.dts
index 559c4256d48a..19e8ece4aa2a 100644
--- a/arch/mips/boot/dts/ralink/vocore2.dts
+++ b/arch/mips/boot/dts/ralink/vocore2.dts
@@ -62,3 +62,7 @@
     status = "okay";
     mediatek,mtd-eeprom = <&eeprom 0x0000>;
 };
+
+&mmc {
+    status = "okay";
+};
diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
index 0e57845d7f9a..930c2776f6fd 100644
--- a/arch/mips/ralink/clk.c
+++ b/arch/mips/ralink/clk.c
@@ -90,4 +90,4 @@ struct clk *clk_get_parent(struct clk *clk)
 {
     return NULL;
 }
-EXPORT_SYMBOL(clk_get_parent);
+EXPORT_SYMBOL_GPL(clk_get_parent);
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index 33f4b6387ef7..13464161521c 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -721,18 +721,22 @@ static void msdc_set_timeout(struct msdc_host
*host, u32 ns, u32 clks)
 
 static void msdc_gate_clock(struct msdc_host *host)
 {
+#ifdef handle_clocks
     clk_disable_unprepare(host->src_clk_cg);
     clk_disable_unprepare(host->src_clk);
     clk_disable_unprepare(host->bus_clk);
     clk_disable_unprepare(host->h_clk);
+#endif//handle_clocks
 }
 
 static void msdc_ungate_clock(struct msdc_host *host)
 {
+#ifdef handle_clocks
     clk_prepare_enable(host->h_clk);
     clk_prepare_enable(host->bus_clk);
     clk_prepare_enable(host->src_clk);
     clk_prepare_enable(host->src_clk_cg);
+#endif//handle_clocks
     while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB))
         cpu_relax();
 }
@@ -2199,6 +2203,9 @@ static int msdc_drv_probe(struct platform_device
*pdev)
     if (ret)
         goto host_free;
 
+
+#ifdef handle_clocks
+#error "should NOT compile!"
     host->src_clk = devm_clk_get(&pdev->dev, "source");
     if (IS_ERR(host->src_clk)) {
         ret = PTR_ERR(host->src_clk);
@@ -2218,6 +2225,7 @@ static int msdc_drv_probe(struct platform_device
*pdev)
     host->src_clk_cg = devm_clk_get(&pdev->dev, "source_cg");
     if (IS_ERR(host->src_clk_cg))
         host->src_clk_cg = NULL;
+#endif //handle_clocks
 
     host->irq = platform_get_irq(pdev, 0);
     if (host->irq < 0) {
-- 
2.23.0