[PATCH 1/2] clk: Move clk-gate2 to clock driver directory

[Sean Anderson]

Make clk-gate2 available for use outside of imx.

Signed-off-by: Sean Anderson <seanga2 at gmail.com>
---
 drivers/clk/Makefile              |  1 +
 drivers/clk/{imx => }/clk-gate2.c | 20 ++++----------------
 drivers/clk/imx/Makefile          |  2 +-
 drivers/clk/imx/clk.h             |  5 -----
 include/linux/clk-provider.h      | 24 ++++++++++++++++++++----
 5 files changed, 26 insertions(+), 26 deletions(-)
 rename drivers/clk/{imx => }/clk-gate2.c (85%)

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 06131edb9f..fef3280f16 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_rate.o
 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o
 obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk.o clk-divider.o clk-mux.o clk-gate.o
 obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-fixed-factor.o
+obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-gate2.o
 obj-$(CONFIG_$(SPL_TPL_)CLK_COMPOSITE_CCF) += clk-composite.o

 obj-y += analogbits/
diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/clk-gate2.c
similarity index 85%
rename from drivers/clk/imx/clk-gate2.c
rename to drivers/clk/clk-gate2.c
index 1b9db6e791..cfe21e5496 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/clk-gate2.c
@@ -10,8 +10,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  *
- * Gated clock implementation
- *
+ * Gated clock which redirects rate functions to its parent clock
  */

 #include <common.h>
@@ -21,19 +20,8 @@
 #include <dm/device.h>
 #include <linux/clk-provider.h>
 #include <clk.h>
-#include "clk.h"
-
-#define UBOOT_DM_CLK_IMX_GATE2 "imx_clk_gate2"
-
-struct clk_gate2 {
-	struct clk clk;
-	void __iomem	*reg;
-	u8		bit_idx;
-	u8		cgr_val;
-	u8		flags;
-};

-#define to_clk_gate2(_clk) container_of(_clk, struct clk_gate2, clk)
+#define UBOOT_DM_CLK_GATE2 "clk_gate2"

 static int clk_gate2_enable(struct clk *clk)
 {
@@ -97,7 +85,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,

 	clk = &gate->clk;

-	ret = clk_register(clk, UBOOT_DM_CLK_IMX_GATE2, name, parent_name);
+	ret = clk_register(clk, UBOOT_DM_CLK_GATE2, name, parent_name);
 	if (ret) {
 		kfree(gate);
 		return ERR_PTR(ret);
@@ -107,7 +95,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
 }

 U_BOOT_DRIVER(clk_gate2) = {
-	.name	= UBOOT_DM_CLK_IMX_GATE2,
+	.name	= UBOOT_DM_CLK_GATE2,
 	.id	= UCLASS_CLK,
 	.ops	= &clk_gate2_ops,
 	.flags = DM_FLAG_PRE_RELOC,
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 222c5a4e08..5328e9265a 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -2,7 +2,7 @@
 #
 # SPDX-License-Identifier: GPL-2.0

-obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-gate2.o clk-pllv3.o clk-pfd.o
+obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-pllv3.o clk-pfd.o
 obj-$(CONFIG_$(SPL_TPL_)CLK_IMX6Q) += clk-imx6q.o
 obj-$(CONFIG_CLK_IMX8) += clk-imx8.o

diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 07dcf94ea5..c46570e9f4 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -45,11 +45,6 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
 			    void __iomem *base,
 			    const struct imx_pll14xx_clk *pll_clk);

-struct clk *clk_register_gate2(struct device *dev, const char *name,
-		const char *parent_name, unsigned long flags,
-		void __iomem *reg, u8 bit_idx, u8 cgr_val,
-		u8 clk_gate_flags);
-
 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
 			  const char *parent_name, void __iomem *base,
 			  u32 div_mask);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 0ef6e685ad..f510291018 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -90,10 +90,6 @@ struct clk_gate {
 #define CLK_GATE_HIWORD_MASK		BIT(1)

 extern const struct clk_ops clk_gate_ops;
-struct clk *clk_register_gate(struct device *dev, const char *name,
-			      const char *parent_name, unsigned long flags,
-			      void __iomem *reg, u8 bit_idx,
-			      u8 clk_gate_flags, spinlock_t *lock);

 struct clk_div_table {
 	unsigned int	val;
@@ -159,6 +155,16 @@ struct clk_composite {

 #define to_clk_composite(_clk) container_of(_clk, struct clk_composite, clk)

+struct clk_gate2 {
+	struct clk clk;
+	void __iomem	*reg;
+	u8		bit_idx;
+	u8		cgr_val;
+	u8		flags;
+};
+
+#define to_clk_gate2(_clk) container_of(_clk, struct clk_gate2, clk)
+
 struct clk *clk_register_composite(struct device *dev, const char *name,
 		const char * const *parent_names, int num_parents,
 		struct clk *mux_clk, const struct clk_ops *mux_ops,
@@ -184,6 +190,16 @@ struct clk *clk_register_mux(struct device *dev, const char *name,
 		void __iomem *reg, u8 shift, u8 width,
 		u8 clk_mux_flags);

+struct clk *clk_register_gate(struct device *dev, const char *name,
+			      const char *parent_name, unsigned long flags,
+			      void __iomem *reg, u8 bit_idx,
+			      u8 clk_gate_flags, spinlock_t *lock);
+
+struct clk *clk_register_gate2(struct device *dev, const char *name,
+			       const char *parent_name, unsigned long flags,
+			       void __iomem *reg, u8 bit_idx, u8 cgr_val,
+			       u8 clk_gate_flags);
+
 const char *clk_hw_get_name(const struct clk *hw);
 ulong clk_generic_get_rate(struct clk *clk);

-- 
2.24.1