[U-Boot][RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees from Linux
Stefano Babic
sbabic at denx.de
Fri Dec 27 14:53:57 CET 2019
Hi Robert,
I merged this series into -next branch, sorry for delay. Anyway, this
series makes obsolete (at least in part) the previous one:
https://patchwork.ozlabs.org/patch/1182350/
I will mark that series as superseeded in patchwork, please repost the
missing patches on top of the (u-boot-imx) -next branch, thanks !
Best regards,
Stefano Babic
On 12/11/19 20:15, Robert Beckett wrote:
> Copy device trees from linux, keeping them as separate files for
> each board to ease future sync.
>
> Update board code to use generic bx50v3 dt initially, then select
> the specific dt based on board detection.
>
> Signed-off-by: Robert Beckett <bob.beckett at collabora.com>
> ---
>
> arch/arm/dts/Makefile | 7 +-
> arch/arm/dts/imx6q-b450v3.dts | 160 +++++++++
> arch/arm/dts/imx6q-b650v3.dts | 159 ++++++++
> arch/arm/dts/imx6q-b850v3.dts | 302 ++++++++++++++++
> arch/arm/dts/imx6q-ba16.dtsi | 640 +++++++++++++++++++++++++++++++++
> arch/arm/dts/imx6q-bx50v3.dts | 78 +---
> arch/arm/dts/imx6q-bx50v3.dtsi | 380 ++++++++++++++++++++
> board/ge/bx50v3/bx50v3.c | 34 +-
> configs/ge_bx50v3_defconfig | 5 +
> 9 files changed, 1689 insertions(+), 76 deletions(-)
> create mode 100644 arch/arm/dts/imx6q-b450v3.dts
> create mode 100644 arch/arm/dts/imx6q-b650v3.dts
> create mode 100644 arch/arm/dts/imx6q-b850v3.dts
> create mode 100644 arch/arm/dts/imx6q-ba16.dtsi
> create mode 100644 arch/arm/dts/imx6q-bx50v3.dtsi
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 85ef00a2bd..1ee7fa197d 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -829,7 +829,12 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
> mt7629-rfb.dtb \
> mt8516-pumpkin.dtb
>
> -dtb-$(CONFIG_TARGET_GE_BX50V3) += imx6q-bx50v3.dtb
> +dtb-$(CONFIG_TARGET_GE_BX50V3) += \
> + imx6q-bx50v3.dtb \
> + imx6q-b850v3.dtb \
> + imx6q-b650v3.dtb \
> + imx6q-b450v3.dtb
> +
> dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb
>
> dtb-$(CONFIG_TARGET_VEXPRESS_CA5X2) += vexpress-v2p-ca5s.dtb
> diff --git a/arch/arm/dts/imx6q-b450v3.dts b/arch/arm/dts/imx6q-b450v3.dts
> new file mode 100644
> index 0000000000..7fca833cbf
> --- /dev/null
> +++ b/arch/arm/dts/imx6q-b450v3.dts
> @@ -0,0 +1,160 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR X11
> +/*
> + * Copyright 2015 Timesys Corporation.
> + * Copyright 2015 General Electric Company
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q-bx50v3.dtsi"
> +
> +/ {
> + model = "General Electric B450v3";
> + compatible = "ge,imx6q-b450v3", "advantech,imx6q-ba16", "fsl,imx6q";
> +
> + chosen {
> + stdout-path = &uart3;
> + };
> +
> + panel-lvds0 {
> + compatible = "innolux,g121x1-l03";
> + backlight = <&backlight_lvds>;
> + power-supply = <®_lvds>;
> +
> + port {
> + panel_in_lvds0: endpoint {
> + remote-endpoint = <&lvds0_out>;
> + };
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
> + <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
> + <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
> +};
> +
> +&ldb {
> + status = "okay";
> +
> + lvds0: lvds-channel at 0 {
> + fsl,data-mapping = "spwg";
> + fsl,data-width = <24>;
> + status = "okay";
> +
> + port at 4 {
> + reg = <4>;
> +
> + lvds0_out: endpoint {
> + remote-endpoint = <&panel_in_lvds0>;
> + };
> + };
> + };
> +};
> +
> +&pca9539 {
> + P04 {
> + gpio-hog;
> + gpios = <4 0>;
> + output-low;
> + line-name = "PCA9539-P04";
> + };
> +
> + P07 {
> + gpio-hog;
> + gpios = <7 0>;
> + output-low;
> + line-name = "PCA9539-P07";
> + };
> +};
> +
> +&pci_root {
> + /* Intel Corporation I210 Gigabit Network Connection */
> + switch_nic: ethernet at 3,0 {
> + compatible = "pci8086,1533";
> + reg = <0x00010000 0 0 0 0>;
> + };
> +};
> +
> +&switch_ports {
> + port at 0 {
> + reg = <0>;
> + label = "enacq";
> + phy-handle = <&switchphy0>;
> + };
> +
> + port at 1 {
> + reg = <1>;
> + label = "eneport1";
> + phy-handle = <&switchphy1>;
> + };
> +
> + port at 2 {
> + reg = <2>;
> + label = "enix";
> + phy-handle = <&switchphy2>;
> + };
> +
> + port at 3 {
> + reg = <3>;
> + label = "enid";
> + phy-handle = <&switchphy3>;
> + };
> +
> + port at 4 {
> + reg = <4>;
> + label = "cpu";
> + ethernet = <&switch_nic>;
> + phy-handle = <&switchphy4>;
> + };
> +
> + port at 5 {
> + reg = <5>;
> + label = "enembc";
> +
> + /* connected to Ethernet MAC of AT91RM9200 in MII mode */
> + fixed-link {
> + speed = <100>;
> + full-duplex;
> + };
> + };
> +};
> diff --git a/arch/arm/dts/imx6q-b650v3.dts b/arch/arm/dts/imx6q-b650v3.dts
> new file mode 100644
> index 0000000000..ba12e9be5f
> --- /dev/null
> +++ b/arch/arm/dts/imx6q-b650v3.dts
> @@ -0,0 +1,159 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR X11
> +/*
> + * Copyright 2015 Timesys Corporation.
> + * Copyright 2015 General Electric Company
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q-bx50v3.dtsi"
> +
> +/ {
> + model = "General Electric B650v3";
> + compatible = "ge,imx6q-b650v3", "advantech,imx6q-ba16", "fsl,imx6q";
> +
> + chosen {
> + stdout-path = &uart3;
> + };
> +
> + panel-lvds0 {
> + compatible = "innolux,g121x1-l03";
> + backlight = <&backlight_lvds>;
> + power-supply = <®_lvds>;
> +
> + port {
> + panel_in_lvds0: endpoint {
> + remote-endpoint = <&lvds0_out>;
> + };
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
> + <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
> + <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
> +};
> +
> +&ldb {
> + status = "okay";
> +
> + lvds0: lvds-channel at 0 {
> + fsl,data-mapping = "spwg";
> + fsl,data-width = <24>;
> + status = "okay";
> +
> + port at 4 {
> + reg = <4>;
> +
> + lvds0_out: endpoint {
> + remote-endpoint = <&panel_in_lvds0>;
> + };
> + };
> + };
> +};
> +
> +&pca9539 {
> + P07 {
> + gpio-hog;
> + gpios = <7 0>;
> + output-low;
> + line-name = "PCA9539-P07";
> + };
> +};
> +
> +&usbphy1 {
> + fsl,tx-cal-45-dn-ohms = <55>;
> + fsl,tx-cal-45-dp-ohms = <55>;
> + fsl,tx-d-cal = <100>;
> +};
> +
> +&pci_root {
> + /* Intel Corporation I210 Gigabit Network Connection */
> + switch_nic: ethernet at 3,0 {
> + compatible = "pci8086,1533";
> + reg = <0x00010000 0 0 0 0>;
> + };
> +};
> +
> +&switch_ports {
> + port at 0 {
> + reg = <0>;
> + label = "enacq";
> + phy-handle = <&switchphy0>;
> + };
> +
> + port at 1 {
> + reg = <1>;
> + label = "eneport1";
> + phy-handle = <&switchphy1>;
> + };
> +
> + port at 2 {
> + reg = <2>;
> + label = "enix";
> + phy-handle = <&switchphy2>;
> + };
> +
> + port at 3 {
> + reg = <3>;
> + label = "enid";
> + phy-handle = <&switchphy3>;
> + };
> +
> + port at 4 {
> + reg = <4>;
> + label = "cpu";
> + ethernet = <&switch_nic>;
> + phy-handle = <&switchphy4>;
> + };
> +
> + port at 5 {
> + reg = <5>;
> + label = "enembc";
> +
> + /* connected to Ethernet MAC of AT91RM9200 in MII mode */
> + fixed-link {
> + speed = <100>;
> + full-duplex;
> + };
> + };
> +};
> diff --git a/arch/arm/dts/imx6q-b850v3.dts b/arch/arm/dts/imx6q-b850v3.dts
> new file mode 100644
> index 0000000000..0a98552691
> --- /dev/null
> +++ b/arch/arm/dts/imx6q-b850v3.dts
> @@ -0,0 +1,302 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR X11
> +/*
> + * Copyright 2015 Timesys Corporation.
> + * Copyright 2015 General Electric Company
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q-bx50v3.dtsi"
> +
> +/ {
> + model = "General Electric B850v3";
> + compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q";
> +
> + chosen {
> + stdout-path = &uart3;
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
> + <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
> + <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
> + <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
> + <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
> + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
> + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
> +};
> +
> +&ldb {
> + fsl,dual-channel;
> + status = "okay";
> +
> + lvds0: lvds-channel at 0 {
> + fsl,data-mapping = "spwg";
> + fsl,data-width = <24>;
> + status = "okay";
> +
> + port at 4 {
> + reg = <4>;
> +
> + lvds0_out: endpoint {
> + remote-endpoint = <&stdp4028_in>;
> + };
> + };
> + };
> +};
> +
> +&i2c2 {
> + pca9547_ddc: mux at 70 {
> + compatible = "nxp,pca9547";
> + reg = <0x70>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + mux2_i2c1: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0>;
> + };
> +
> + mux2_i2c2: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1>;
> + };
> +
> + mux2_i2c3: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> + };
> +
> + mux2_i2c4: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x3>;
> + };
> +
> + mux2_i2c5: i2c at 4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x4>;
> + };
> +
> + mux2_i2c6: i2c at 5 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x5>;
> + };
> +
> + mux2_i2c7: i2c at 6 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x6>;
> + };
> +
> + mux2_i2c8: i2c at 7 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x7>;
> + };
> + };
> +};
> +
> +&hdmi {
> + ddc-i2c-bus = <&mux2_i2c1>;
> +};
> +
> +&mux1_i2c1 {
> + ads7830 at 4a {
> + compatible = "ti,ads7830";
> + reg = <0x4a>;
> + };
> +};
> +
> +&mux2_i2c2 {
> + clock-frequency = <100000>;
> +
> + stdp2690 at 72 {
> + compatible = "megachips,stdp2690-ge-b850v3-fw";
> + reg = <0x72>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> +
> + stdp2690_in: endpoint {
> + remote-endpoint = <&stdp4028_out>;
> + };
> + };
> +
> + port at 1 {
> + reg = <1>;
> +
> + stdp2690_out: endpoint {
> + /* Connector for external display */
> + };
> + };
> + };
> + };
> +
> + stdp4028 at 73 {
> + compatible = "megachips,stdp4028-ge-b850v3-fw";
> + reg = <0x73>;
> + interrupt-parent = <&gpio2>;
> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> +
> + stdp4028_in: endpoint {
> + remote-endpoint = <&lvds0_out>;
> + };
> + };
> +
> + port at 1 {
> + reg = <1>;
> +
> + stdp4028_out: endpoint {
> + remote-endpoint = <&stdp2690_in>;
> + };
> + };
> + };
> + };
> +};
> +
> +&pca9539 {
> + P10 {
> + gpio-hog;
> + gpios = <8 0>;
> + output-low;
> + line-name = "PCA9539-P10";
> + };
> +
> + P11 {
> + gpio-hog;
> + gpios = <9 0>;
> + output-low;
> + line-name = "PCA9539-P11";
> + };
> +};
> +
> +&pci_root {
> + /* PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch */
> + bridge at 1,0 {
> + compatible = "pci10b5,8605";
> + reg = <0x00010000 0 0 0 0>;
> +
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> +
> + bridge at 2,1 {
> + compatible = "pci10b5,8605";
> + reg = <0x00020800 0 0 0 0>;
> +
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> +
> + /* Intel Corporation I210 Gigabit Network Connection */
> + ethernet at 3,0 {
> + compatible = "pci8086,1533";
> + reg = <0x00030000 0 0 0 0>;
> + };
> + };
> +
> + bridge at 2,2 {
> + compatible = "pci10b5,8605";
> + reg = <0x00021000 0 0 0 0>;
> +
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> +
> + /* Intel Corporation I210 Gigabit Network Connection */
> + switch_nic: ethernet at 4,0 {
> + compatible = "pci8086,1533";
> + reg = <0x00040000 0 0 0 0>;
> + };
> + };
> + };
> +};
> +
> +&switch_ports {
> + port at 0 {
> + reg = <0>;
> + label = "eneport1";
> + phy-handle = <&switchphy0>;
> + };
> +
> + port at 1 {
> + reg = <1>;
> + label = "eneport2";
> + phy-handle = <&switchphy1>;
> + };
> +
> + port at 2 {
> + reg = <2>;
> + label = "enix";
> + phy-handle = <&switchphy2>;
> + };
> +
> + port at 3 {
> + reg = <3>;
> + label = "enid";
> + phy-handle = <&switchphy3>;
> + };
> +
> + port at 4 {
> + reg = <4>;
> + label = "cpu";
> + ethernet = <&switch_nic>;
> + phy-handle = <&switchphy4>;
> + };
> +};
> diff --git a/arch/arm/dts/imx6q-ba16.dtsi b/arch/arm/dts/imx6q-ba16.dtsi
> new file mode 100644
> index 0000000000..7d8f61f2fd
> --- /dev/null
> +++ b/arch/arm/dts/imx6q-ba16.dtsi
> @@ -0,0 +1,640 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR X11
> +/*
> + * Support for imx6 based Advantech DMS-BA16 Qseven module
> + *
> + * Copyright 2015 Timesys Corporation.
> + * Copyright 2015 General Electric Company
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "imx6q.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> + memory at 10000000 {
> + device_type = "memory";
> + reg = <0x10000000 0x40000000>;
> + };
> +
> + backlight_lvds: backlight {
> + compatible = "pwm-backlight";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_display>;
> + pwms = <&pwm1 0 5000000>;
> + brightness-levels = < 0 1 2 3 4 5 6 7 8 9
> + 10 11 12 13 14 15 16 17 18 19
> + 20 21 22 23 24 25 26 27 28 29
> + 30 31 32 33 34 35 36 37 38 39
> + 40 41 42 43 44 45 46 47 48 49
> + 50 51 52 53 54 55 56 57 58 59
> + 60 61 62 63 64 65 66 67 68 69
> + 70 71 72 73 74 75 76 77 78 79
> + 80 81 82 83 84 85 86 87 88 89
> + 90 91 92 93 94 95 96 97 98 99
> + 100 101 102 103 104 105 106 107 108 109
> + 110 111 112 113 114 115 116 117 118 119
> + 120 121 122 123 124 125 126 127 128 129
> + 130 131 132 133 134 135 136 137 138 139
> + 140 141 142 143 144 145 146 147 148 149
> + 150 151 152 153 154 155 156 157 158 159
> + 160 161 162 163 164 165 166 167 168 169
> + 170 171 172 173 174 175 176 177 178 179
> + 180 181 182 183 184 185 186 187 188 189
> + 190 191 192 193 194 195 196 197 198 199
> + 200 201 202 203 204 205 206 207 208 209
> + 210 211 212 213 214 215 216 217 218 219
> + 220 221 222 223 224 225 226 227 228 229
> + 230 231 232 233 234 235 236 237 238 239
> + 240 241 242 243 244 245 246 247 248 249
> + 250 251 252 253 254 255>;
> + default-brightness-level = <255>;
> + enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + reg_lvds: regulator-lvds {
> + compatible = "regulator-fixed";
> + regulator-name = "lvds_ppen";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_usb_h1_vbus: regulator-usbh1vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +
> + reg_usb_otg_vbus: regulator-usbotgvbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&ecspi1 {
> + cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ecspi1>;
> + status = "okay";
> +
> + flash: n25q032 at 0 {
> + compatible = "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <20000000>;
> + reg = <0>;
> +
> + partition at 0 {
> + label = "U-Boot";
> + reg = <0x0 0xc0000>;
> + };
> +
> + partition at c0000 {
> + label = "env";
> + reg = <0xc0000 0x10000>;
> + };
> +
> + partition at d0000 {
> + label = "spare";
> + reg = <0xd0000 0x320000>;
> + };
> +
> + partition at 3f0000 {
> + label = "mfg";
> + reg = <0x3f0000 0x10000>;
> + };
> + };
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +};
> +
> +&hdmi {
> + ddc-i2c-bus = <&i2c2>;
> + status = "okay";
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3>;
> + status = "okay";
> +
> + pmic at 58 {
> + compatible = "dlg,da9063";
> + reg = <0x58>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pmic>;
> + interrupt-parent = <&gpio7>;
> + interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
> +
> + onkey {
> + compatible = "dlg,da9063-onkey";
> + };
> +
> + regulators {
> + vdd_bcore1: bcore1 {
> + regulator-min-microvolt = <1420000>;
> + regulator-max-microvolt = <1420000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_bcore2: bcore2 {
> + regulator-min-microvolt = <1420000>;
> + regulator-max-microvolt = <1420000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_bpro: bpro {
> + regulator-min-microvolt = <1500000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_bmem: bmem {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_bio: bio {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_bperi: bperi {
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_ldo1: ldo1 {
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1860000>;
> + };
> +
> + vdd_ldo2: ldo2 {
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <1860000>;
> + };
> +
> + vdd_ldo3: ldo3 {
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <3440000>;
> + };
> +
> + vdd_ldo4: ldo4 {
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <3440000>;
> + };
> +
> + vdd_ldo5: ldo5 {
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <3600000>;
> + };
> +
> + vdd_ldo6: ldo6 {
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <3600000>;
> + };
> +
> + vdd_ldo7: ldo7 {
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <3600000>;
> + };
> +
> + vdd_ldo8: ldo8 {
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <3600000>;
> + };
> +
> + vdd_ldo9: ldo9 {
> + regulator-min-microvolt = <950000>;
> + regulator-max-microvolt = <3600000>;
> + };
> +
> + vdd_ldo10: ldo10 {
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <3600000>;
> + };
> +
> + vdd_ldo11: ldo11 {
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <3600000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> + };
> + };
> +
> + rtc at 32 {
> + compatible = "epson,rx8010";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rtc>;
> + reg = <0x32>;
> + interrupt-parent = <&gpio4>;
> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
> + fsl,tx-swing-full = <103>;
> + fsl,tx-swing-low = <103>;
> + status = "okay";
> +};
> +
> +&pwm1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm1>;
> + status = "okay";
> +};
> +
> +&pwm2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm2>;
> + status = "disabled";
> +};
> +
> +&sata {
> + status = "okay";
> +};
> +
> +&ssi1 {
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + uart-has-rtscts;
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + vbus-supply = <®_usb_h1_vbus>;
> + reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc2>;
> + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + no-1-8-v;
> + keep-power-in-suspend;
> + wakeup-source;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
> + bus-width = <8>;
> + vmmc-supply = <&vdd_bperi>;
> + non-removable;
> + keep-power-in-suspend;
> + status = "okay";
> +};
> +
> +&wdog1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wdog>;
> + fsl,ext-reset-output;
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + pinctrl_audmux: audmuxgrp {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_display: dispgrp {
> + fsl,pins = <
> + /* BLEN_OUT */
> + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
> + /* LVDS_PPEN_OUT */
> + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
> + >;
> + };
> +
> + pinctrl_ecspi1: ecspi1grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
> + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
> + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
> + /* SPI1 CS */
> + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
> + >;
> + };
> +
> + pinctrl_ecspi5: ecspi5grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0
> + MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0
> + MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0
> + MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
> + >;
> + };
> +
> + pinctrl_enet: enetgrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
> + /* FEC Reset */
> + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
> + /* AR8033 Interrupt */
> + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
> + >;
> + };
> +
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + /* GPIO 0-7 */
> + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
> + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
> + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
> + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
> + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
> + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0
> + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
> + MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0
> + /* SUS_S3_OUT to CPLD */
> + MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
> + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3: i2c3grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + /* PCIe Reset */
> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
> + /* PCIe Wake */
> + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
> + >;
> + };
> +
> + pinctrl_pmic: pmicgrp {
> + fsl,pins = <
> + /* PMIC Interrupt */
> + MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
> + >;
> + };
> +
> + pinctrl_pwm1: pwm1grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
> + >;
> + };
> +
> + pinctrl_pwm2: pwm2grp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
> + >;
> + };
> +
> + pinctrl_rtc: rtcgrp {
> + fsl,pins = <
> + /* RTC_INT */
> + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
> + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
> + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
> + MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart4: uart4grp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + /* HUB_RESET */
> + MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0
> + >;
> + };
> +
> + pinctrl_usbotg: usbotggrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc2: usdhc2grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
> + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
> + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
> + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
> + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
> + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
> + /* uSDHC2 CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
> + >;
> + };
> +
> + pinctrl_usdhc3: usdhc3grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
> + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
> + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
> + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
> + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc3_reset: usdhc3grp-reset {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4: usdhc4grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
> + /* uSDHC4 CD */
> + MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
> + /* uSDHC4 SDIO PWR */
> + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
> + /* uSDHC4 SDIO WP */
> + MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
> + /* uSDHC4 SDIO LED */
> + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
> + >;
> + };
> +
> + pinctrl_wdog: wdoggrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
> + >;
> + };
> +};
> diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
> index deaec63509..a44d7004cb 100644
> --- a/arch/arm/dts/imx6q-bx50v3.dts
> +++ b/arch/arm/dts/imx6q-bx50v3.dts
> @@ -1,4 +1,4 @@
> -/* SPDX-License-Identifier: GPL-2.0+ OR X11 */
> +// SPDX-License-Identifier: GPL-2.0+ OR X11
> /*
> * Copyright 2015 Timesys Corporation.
> * Copyright 2018 General Electric Company
> @@ -7,83 +7,13 @@
>
> /dts-v1/;
>
> -#include "imx6q.dtsi"
> -#include <dt-bindings/gpio/gpio.h>
> +#include "imx6q-bx50v3.dtsi"
>
> / {
> model = "General Electric Bx50v3";
> compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q";
> -};
> -
> -&iomuxc {
> - pinctrl-names = "default";
> -
> - pinctrl_ecspi1: ecspi1grp {
> - fsl,pins = <
> - MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
> - MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
> - MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
> - /* SPI1 CS */
> - MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
> - >;
> - };
> -
> - pinctrl_usdhc3: usdhc3grp {
> - fsl,pins = <
> - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
> - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
> - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
> - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
> - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
> - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
> - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
> - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
> - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
> - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
> - >;
> - };
> -
> - pinctrl_usdhc3_reset: usdhc3grp-reset {
> - fsl,pins = <
> - MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
> - >;
> - };
> -};
> -
> -&usdhc1 {
> - status = "disabled";
> -};
> -
> -&usdhc2 {
> - status = "disabled";
> -};
> -
> -/* eMMC */
> -&usdhc3 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
> - bus-width = <8>;
> - non-removable;
> - keep-power-in-suspend;
> - status = "okay";
> -};
> -
> -&usdhc4 {
> - status = "disabled";
> -};
> -
> -/* SPI NOR */
> -&ecspi1 {
> - cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_ecspi1>;
> - status = "okay";
>
> - flash: n25q032 at 0 {
> - compatible = "jedec,spi-nor";
> - #address-cells = <1>;
> - #size-cells = <1>;
> - spi-max-frequency = <20000000>;
> - reg = <0>;
> + chosen {
> + stdout-path = &uart3;
> };
> };
> diff --git a/arch/arm/dts/imx6q-bx50v3.dtsi b/arch/arm/dts/imx6q-bx50v3.dtsi
> new file mode 100644
> index 0000000000..009f88e305
> --- /dev/null
> +++ b/arch/arm/dts/imx6q-bx50v3.dtsi
> @@ -0,0 +1,380 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR X11
> +/*
> + * Copyright 2015 Timesys Corporation.
> + * Copyright 2015 General Electric Company
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "imx6q-ba16.dtsi"
> +
> +/ {
> + mclk: clock-mclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <22000000>;
> + };
> +
> + gpio-poweroff {
> + compatible = "gpio-poweroff";
> + gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
> + status = "okay";
> + };
> +
> + reg_wl18xx_vmmc: regulator-wl18xx {
> + compatible = "regulator-fixed";
> + regulator-name = "vwl1807";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
> + startup-delay-us = <70000>;
> + enable-active-high;
> + };
> +
> + reg_wlan: regulator-wlan {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V_wlan";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
> + };
> +
> + sound {
> + compatible = "fsl,imx6q-ba16-sgtl5000",
> + "fsl,imx-audio-sgtl5000";
> + model = "imx6q-ba16-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&sgtl5000>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "LINE_IN", "Line In Jack",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +
> + aliases {
> + mdio-gpio0 = &mdio0;
> + };
> +
> + mdio0: mdio-gpio {
> + compatible = "virtual,mdio-gpio";
> + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
> + <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + switch at 0 {
> + compatible = "marvell,mv88e6085"; /* 88e6240*/
> + reg = <0>;
> +
> + switch_ports: ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + switchphy0: switchphy at 0 {
> + reg = <0>;
> + };
> +
> + switchphy1: switchphy at 1 {
> + reg = <1>;
> + };
> +
> + switchphy2: switchphy at 2 {
> + reg = <2>;
> + };
> +
> + switchphy3: switchphy at 3 {
> + reg = <3>;
> + };
> +
> + switchphy4: switchphy at 4 {
> + reg = <4>;
> + };
> + };
> + };
> + };
> +};
> +
> +&ecspi5 {
> + cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ecspi5>;
> + status = "okay";
> +
> + m25_eeprom: m25p80 at 0 {
> + compatible = "atmel,at25";
> + spi-max-frequency = <10000000>;
> + size = <0x8000>;
> + pagesize = <64>;
> + reg = <0>;
> + address-width = <16>;
> + };
> +};
> +
> +&i2c1 {
> + pinctrl-names = "default", "gpio";
> + pinctrl-1 = <&pinctrl_i2c1_gpio>;
> + sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
> + scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
> +
> + pca9547: mux at 70 {
> + compatible = "nxp,pca9547";
> + reg = <0x70>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + mux1_i2c1: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0>;
> +
> + ads7830: ads7830 at 48 {
> + compatible = "ti,ads7830";
> + reg = <0x48>;
> + };
> +
> + mma8453: mma8453 at 1c {
> + compatible = "fsl,mma8453";
> + reg = <0x1c>;
> + };
> + };
> +
> + mux1_i2c2: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1>;
> +
> + eeprom: eeprom at 50 {
> + compatible = "atmel,24c08";
> + reg = <0x50>;
> + };
> +
> + mpl3115: mpl3115 at 60 {
> + compatible = "fsl,mpl3115";
> + reg = <0x60>;
> + };
> + };
> +
> + mux1_i2c3: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> + };
> +
> + mux1_i2c4: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x3>;
> +
> + sgtl5000: codec at a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&mclk>;
> + VDDA-supply = <®_1p8v>;
> + VDDIO-supply = <®_3p3v>;
> + };
> + };
> +
> + mux1_i2c5: i2c at 4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x4>;
> +
> + pca9539: pca9539 at 74 {
> + compatible = "nxp,pca9539";
> + reg = <0x74>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + interrupt-parent = <&gpio2>;
> + interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> +
> + P12 {
> + gpio-hog;
> + gpios = <10 0>;
> + output-low;
> + line-name = "PCA9539-P12";
> + };
> +
> + P13 {
> + gpio-hog;
> + gpios = <11 0>;
> + output-low;
> + line-name = "PCA9539-P13";
> + };
> +
> + P14 {
> + gpio-hog;
> + gpios = <12 0>;
> + output-low;
> + line-name = "PCA9539-P14";
> + };
> +
> + P15 {
> + gpio-hog;
> + gpios = <13 0>;
> + output-low;
> + line-name = "PCA9539-P15";
> + };
> +
> + P16 {
> + gpio-hog;
> + gpios = <14 0>;
> + output-low;
> + line-name = "PCA9539-P16";
> + };
> +
> + P17 {
> + gpio-hog;
> + gpios = <15 0>;
> + output-low;
> + line-name = "PCA9539-P17";
> + };
> + };
> + };
> +
> + mux1_i2c6: i2c at 5 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x5>;
> + };
> +
> + mux1_i2c7: i2c at 6 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x6>;
> + };
> +
> + mux1_i2c8: i2c at 7 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x7>;
> + };
> + };
> +};
> +
> +&i2c2 {
> + pinctrl-names = "default", "gpio";
> + pinctrl-1 = <&pinctrl_i2c2_gpio>;
> + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
> + scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default", "gpio";
> + pinctrl-1 = <&pinctrl_i2c3_gpio>;
> + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> + scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&iomuxc {
> + pinctrl_i2c1_gpio: i2c1gpiogrp {
> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0
> + MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c2_gpio: i2c2gpiogrp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
> + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c3_gpio: i2c3gpiogrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
> + >;
> + };
> +};
> +
> +&pmu {
> + secure-reg-access;
> +};
> +
> +&usdhc2 {
> + status = "disabled";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc4>;
> + bus-width = <4>;
> + vmmc-supply = <®_wl18xx_vmmc>;
> + no-1-8-v;
> + non-removable;
> + wakeup-source;
> + keep-power-in-suspend;
> + cap-power-off-card;
> + max-frequency = <25000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + wlcore: wlcore at 2 {
> + compatible = "ti,wl1837";
> + reg = <2>;
> + interrupt-parent = <&gpio2>;
> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
> + tcxo-clock-frequency = <26000000>;
> + };
> +};
> +
> +&pcie {
> + /* Synopsys, Inc. Device */
> + pci_root: root at 0,0 {
> + compatible = "pci16c3,abcd";
> + reg = <0x00000000 0 0 0 0>;
> +
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + };
> +};
> diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
> index 917ecc4c18..530b106ba5 100644
> --- a/board/ge/bx50v3/bx50v3.c
> +++ b/board/ge/bx50v3/bx50v3.c
> @@ -31,12 +31,13 @@
> #include <pwm.h>
> #include <version.h>
> #include <stdlib.h>
> +#include <dm/root.h>
> #include "../common/ge_common.h"
> #include "../common/vpd_reader.h"
> #include "../../../drivers/net/e1000.h"
> DECLARE_GLOBAL_DATA_PTR;
>
> -static int confidx = 3; /* Default to b850v3. */
> +static int confidx; /* Default to generic. */
> static struct vpd_cache vpd;
>
> #define NC_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
> @@ -552,8 +553,16 @@ int board_init(void)
> setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3);
>
> if (!read_vpd(&vpd, vpd_callback)) {
> + int ret, rescan;
> +
> vpd.is_read = true;
> set_confidx(&vpd);
> +
> + ret = fdtdec_resetup(&rescan);
> + if (!ret && rescan) {
> + dm_uninit();
> + dm_init_and_scan(false);
> + }
> }
>
> gpio_request(SUS_S3_OUT, "sus_s3_out");
> @@ -728,3 +737,26 @@ U_BOOT_CMD(
> "enable Bx50 backlight",
> ""
> );
> +
> +int board_fit_config_name_match(const char *name)
> +{
> + if (!vpd.is_read)
> + return strcmp(name, "imx6q-bx50v3");
> +
> + switch (vpd.product_id) {
> + case VPD_PRODUCT_B450:
> + return strcmp(name, "imx6q-b450v3");
> + case VPD_PRODUCT_B650:
> + return strcmp(name, "imx6q-b650v3");
> + case VPD_PRODUCT_B850:
> + return strcmp(name, "imx6q-b850v3");
> + default:
> + return -1;
> + }
> +}
> +
> +int embedded_dtb_select(void)
> +{
> + vpd.is_read = false;
> + return fdtdec_setup();
> +}
> diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
> index 38f72bf8ef..94ad193393 100644
> --- a/configs/ge_bx50v3_defconfig
> +++ b/configs/ge_bx50v3_defconfig
> @@ -13,6 +13,8 @@ CONFIG_OF_BOARD_SETUP=y
> CONFIG_BOOTDELAY=1
> CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
> CONFIG_SUPPORT_RAW_INITRD=y
> +# CONFIG_DISPLAY_BOARDINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> CONFIG_BOUNCE_BUFFER=y
> CONFIG_BOARD_EARLY_INIT_F=y
> CONFIG_LAST_STAGE_INIT=y
> @@ -33,6 +35,9 @@ CONFIG_CMD_FS_GENERIC=y
> CONFIG_DOS_PARTITION=y
> CONFIG_OF_CONTROL=y
> CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3"
> +CONFIG_OF_LIST="imx6q-bx50v3 imx6q-b850v3 imx6q-b650v3 imx6q-b450v3"
> +CONFIG_DTB_RESELECT=y
> +CONFIG_MULTI_DTB_FIT=y
> CONFIG_ENV_IS_IN_SPI_FLASH=y
> CONFIG_DM=y
> CONFIG_BOOTCOUNT_LIMIT=y
>
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
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