[PATCH 06/11] riscv: Add initial Sipeed Maix support

Sean Anderson seanga2 at gmail.com
Tue Dec 31 23:47:39 CET 2019 

The Sipeed Maix series is a collection of boards built around the RISC-V
Kendryte K210 processor. This processor contains several peripherals to
accelerate neural network processing and other "ai" tasks. This includes a "KPU"
neural network processor, an audio processor supporting beamforming reception,
and a digital video port supporting capture and output at VGA resolution. Other
peripherals include 8M of sram (accessible with and without caching);
remappable pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA
controller; and I2C, I2S, and SPI controllers. Maix peripherals vary, but
include spi flash; on-board usb-serial bridges; ports for cameras, displays, and
sd cards; and ESP32 chips. Currently, only the Sipeed Maix Bit V2.0 (bitm) is
supported, but the boards are fairly similar.

Documentation for Maix boards is located at <http://dl.sipeed.com/MAIX/HDK/>.
Documentation for the Kendryte K210 is located at
<https://kendryte.com/downloads/>. However, hardware details are rather lacking,
so most technical reference has been taken from the standalone sdk located at
<https://github.com/kendryte/kendryte-standalone-sdk>.

Signed-off-by: Sean Anderson <seanga2 at gmail.com>
---
 arch/riscv/Kconfig              |   4 +
 board/sipeed/maix/Kconfig       |  40 ++++++++++
 board/sipeed/maix/MAINTAINERS   |   6 ++
 board/sipeed/maix/Makefile      |   5 ++
 board/sipeed/maix/maix.c        |   9 +++
 configs/sipeed_maix_bitm_config | 136 ++++++++++++++++++++++++++++++++
 include/configs/sipeed-maix.h   |  19 +++++
 7 files changed, 219 insertions(+)
 create mode 100644 board/sipeed/maix/Kconfig
 create mode 100644 board/sipeed/maix/MAINTAINERS
 create mode 100644 board/sipeed/maix/Makefile
 create mode 100644 board/sipeed/maix/maix.c
 create mode 100644 configs/sipeed_maix_bitm_config
 create mode 100644 include/configs/sipeed-maix.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 9a7b0334c2..62c9616220 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -20,6 +20,9 @@ config TARGET_QEMU_VIRT
 config TARGET_SIFIVE_FU540
 	bool "Support SiFive FU540 Board"

+config TARGET_SIPEED_MAIX
+	bool "Support Sipeed Maix Board"
+
 endchoice

 config SYS_ICACHE_OFF
@@ -53,6 +56,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/fu540/Kconfig"
+source "board/sipeed/maix/Kconfig"

 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig
new file mode 100644
index 0000000000..e64517a5cc
--- /dev/null
+++ b/board/sipeed/maix/Kconfig
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2019 Sean Anderson <seanga2 at gmail.com>
+
+if TARGET_SIPEED_MAIX
+
+config SYS_BOARD
+	default "maix"
+
+config SYS_VENDOR
+	default "sipeed"
+
+config SYS_CPU
+	default "generic"
+
+config SYS_CONFIG_NAME
+	default "sipeed-maix"
+
+config SYS_TEXT_BASE
+	default 0x80000000
+
+config NR_CPUS
+	default 2
+
+config NR_DRAM_BANKS
+	default 2
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select GENERIC_RISCV
+	select DM_SERIAL
+	select SIFIVE_SERIAL
+	select ARCH_DEFAULT_RV64I
+	select ENV_IS_NOWHERE
+	imply SIFIVE_CLINT
+	imply SPI
+	imply DM_GPIO
+	imply CMD_GPIO
+	imply SYS_NS16550
+	imply SYS_MALLOC_F
+endif
diff --git a/board/sipeed/maix/MAINTAINERS b/board/sipeed/maix/MAINTAINERS
new file mode 100644
index 0000000000..3632cd1c4c
--- /dev/null
+++ b/board/sipeed/maix/MAINTAINERS
@@ -0,0 +1,6 @@
+Sipeed Maix BOARD
+M:	Sean Anderson <seanga2 at gmail.com>
+S:	Maintained
+F:	board/sipeed/maix/
+F:	include/configs/sipeed-maix.h
+F:	configs/sipeed_maix_defconfig
diff --git a/board/sipeed/maix/Makefile b/board/sipeed/maix/Makefile
new file mode 100644
index 0000000000..4acff5b31e
--- /dev/null
+++ b/board/sipeed/maix/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
+
+obj-y += maix.o
diff --git a/board/sipeed/maix/maix.c b/board/sipeed/maix/maix.c
new file mode 100644
index 0000000000..f8e773acf7
--- /dev/null
+++ b/board/sipeed/maix/maix.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Sean Anderson <seanga2 at gmail.com>
+ */
+
+int board_init(void)
+{
+	return 0;
+}
diff --git a/configs/sipeed_maix_bitm_config b/configs/sipeed_maix_bitm_config
new file mode 100644
index 0000000000..97a246e307
--- /dev/null
+++ b/configs/sipeed_maix_bitm_config
@@ -0,0 +1,136 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2019 Sean Anderson <seanga2 at gmail.com>
+CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_RISCV=y
+CONFIG_SYS_ARCH="riscv"
+CONFIG_SYS_CPU="generic"
+CONFIG_SYS_VENDOR="sipeed"
+CONFIG_SYS_BOARD="maix"
+CONFIG_SYS_CONFIG_NAME="sipeed-maix"
+CONFIG_SPL_LDSCRIPT="arch/riscv/cpu/u-boot-spl.lds"
+CONFIG_SYS_TEXT_BASE=0x80000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_ENV_SIZE=0x1f000
+CONFIG_ERR_PTR_OFFSET=0x0
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_BOOTSTAGE_STASH_ADDR=0
+CONFIG_IDENT_STRING=""
+CONFIG_64BIT=y
+CONFIG_TARGET_SIPEED_MAIX=y
+CONFIG_NR_CPUS=2
+CONFIG_GENERIC_RISCV=y
+CONFIG_ARCH_DEFAULT_RV64I=y
+CONFIG_ARCH_RV64I=y
+CONFIG_CMODEL_MEDLOW=y
+CONFIG_RISCV_MMODE=y
+CONFIG_RISCV_ISA_C=y
+CONFIG_RISCV_ISA_A=y
+CONFIG_SIFIVE_CLINT=y
+CONFIG_SHOW_REGS=y
+CONFIG_STACK_SIZE_SHIFT=14
+CONFIG_ARCH_K210=y
+CONFIG_LOCALVERSION=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYS_MALLOC_F=y
+CONFIG_PHYS_64BIT=y
+CONFIG_BUILD_TARGET=""
+CONFIG_SYS_EXTRA_OPTIONS=""
+CONFIG_BOOTSTAGE_RECORD_COUNT=30
+CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=5
+CONFIG_TPL_BOOTSTAGE_RECORD_COUNT=5
+CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_LOGLEVEL=8
+CONFIG_SPL_LOGLEVEL=8
+CONFIG_TPL_LOGLEVEL=8
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=9
+CONFIG_LOG_DEFAULT_LEVEL=6
+CONFIG_LOG_CONSOLE=y
+CONFIG_LOG_ERROR_RETURN=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_DEFAULT_FDT_FILE=""
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_ARCH_EARLY_INIT_R=y
+CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_SYS_LONGHELP=y
+CONFIG_SYS_PROMPT="=> "
+CONFIG_SYS_XTRACE="y"
+CONFIG_CMD_ENV_EXISTS=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_BLOCK_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_MTDIDS_DEFAULT=""
+CONFIG_MTDPARTS_DEFAULT=""
+CONFIG_CMD_LOG=y
+CONFIG_SUPPORT_OF_CONTROL=y
+CONFIG_DTC=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_SEPARATE=y
+CONFIG_MKIMAGE_DTC_PATH="dtc"
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_DM=y
+CONFIG_DM_WARN=y
+CONFIG_DM_STDIO=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SIMPLE_BUS=y
+CONFIG_DM_DEV_READ_INLINE=y
+CONFIG_BLK=y
+CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_BLOCK_CACHE=y
+CONFIG_CLK=y
+CONFIG_CLK_CCF=y
+CONFIG_CLK_COMPOSITE_CCF=y
+CONFIG_CPU=y
+CONFIG_CPU_RISCV=y
+CONFIG_MMC=y
+CONFIG_MMC_WRITE=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SPI=y
+CONFIG_MMC_QUIRKS=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=0
+CONFIG_SF_DEFAULT_CS=0
+CONFIG_SF_DEFAULT_MODE=3
+CONFIG_SF_DEFAULT_SPEED=133000000
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_USE_4K_SECTORS=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_BAUDRATE=115200
+CONFIG_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+CONFIG_SIFIVE_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_SPI_MEM=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_TIMER=y
+CONFIG_RISCV_TIMER=y
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
+CONFIG_FS_EXT4=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+CONFIG_PRINTF=y
+CONFIG_SPRINTF=y
+CONFIG_STRTO=y
+CONFIG_SYS_HZ=1000
+CONFIG_PANIC_HANG=y
+CONFIG_ZLIB=y
+CONFIG_HEXDUMP=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_ASSUME_MASK=0
diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h
new file mode 100644
index 0000000000..598f7dfdd0
--- /dev/null
+++ b/include/configs/sipeed-maix.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Sean Anderson <seanga2 at gmail.com>
+ */
+
+#ifndef CONFIGS_SIPEED_MAIX_H
+#define CONFIGS_SIPEED_MAIX_H
+
+#include <linux/sizes.h>
+
+#define CONFIG_SYS_LOAD_ADDR 0x80000000
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_LOAD_ADDR
+#define CONFIG_SYS_SDRAM_SIZE SZ_8M
+/* Start just below AI memory */
+#define CONFIG_SYS_INIT_SP_ADDR 0x805FFFFF
+#define CONFIG_SYS_MALLOC_LEN SZ_8K
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
+#endif /* CONFIGS_SIPEED_MAIX_H */
-- 
2.24.1

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