[U-Boot] [PATCH] imx6q_logic: Enable MMC booting from SPL
Lukasz Majewski
lukma at denx.de
Thu Jan 3 23:34:59 UTC 2019
Hi Adam,
> On Thu, Dec 27, 2018 at 10:53 AM Adam Ford <aford173 at gmail.com> wrote:
> >
> > The MMC booting wasn't previously fitting into the codespace.
> > This patch enables MMC booting from the baseboard by reducing
> > some DM overhead during SPL.
> >
>
> I'm going to NAK my own work because I found some bugs after I
> re-based on master, so I'm going to rework a few things.
> Sorry for the noise.
I've made a move to make one imx6q based board to support DM/DTS in
both SPL and u-boot proper.
Maybe, instead of adding new pinmux definitions to SPL, you would like
to look into pinctrl driver (and give some feedback/improvement)?
http://patchwork.ozlabs.org/cover/1019842/
>
> adam
> > Signed-off-by: Adam Ford <aford173 at gmail.com>
> >
> > diff --git a/board/logicpd/imx6/imx6logic.c
> > b/board/logicpd/imx6/imx6logic.c index ce1c8a5d6b..696f5c4183 100644
> > --- a/board/logicpd/imx6/imx6logic.c
> > +++ b/board/logicpd/imx6/imx6logic.c
> > @@ -60,6 +60,7 @@ static iomux_v3_cfg_t const uart3_pads[] = {
> > MX6_PAD_EIM_EB3__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
> > };
> >
> > +#ifndef CONFIG_SPL_BUILD
> > static void fixup_enet_clock(void)
> > {
> > struct iomuxc *iomuxc_regs = (struct iomuxc
> > *)IOMUXC_BASE_ADDR; @@ -108,6 +109,7 @@ static void
> > fixup_enet_clock(void) dm_gpio_set_value(&reset, 1);
> > mdelay(50);
> > }
> > +#endif
> >
> > static void setup_iomux_uart(void)
> > {
> > @@ -158,7 +160,9 @@ int overwrite_console(void)
> >
> > int board_early_init_f(void)
> > {
> > +#ifndef CONFIG_SPL_BUILD
> > fixup_enet_clock();
> > +#endif
> > setup_iomux_uart();
> > setup_nand_pins();
> > return 0;
> > @@ -200,6 +204,74 @@ int spl_start_uboot(void)
> > }
> > #endif
> >
> > +/* SD interface */
> > +#define
> > USDHC_PAD_CTRL \
> > + (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm
> > | \
> > + PAD_CTL_SRE_FAST | PAD_CTL_HYS)
> > +
> > +static iomux_v3_cfg_t const usdhc1_pads[] = {
> > + MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > +};
> > +
> > +static iomux_v3_cfg_t const usdhc2_pads[] = {
> > + MX6_PAD_SD2_DAT0__SD2_DATA0 |
> > MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD2_DAT1__SD2_DATA1 |
> > MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD2_DAT2__SD2_DATA2 |
> > MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD2_DAT3__SD2_DATA3 |
> > MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD2_CLK__SD2_CLK |
> > MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_SD2_CMD__SD2_CMD |
> > MUX_PAD_CTRL(USDHC_PAD_CTRL),
> > + MX6_PAD_GPIO_4__GPIO1_IO04 |
> > MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +};
> > +
> > +#ifdef CONFIG_FSL_ESDHC
> > +struct fsl_esdhc_cfg usdhc_cfg[] = {
> > + {USDHC1_BASE_ADDR}, /* SOM */
> > + {USDHC2_BASE_ADDR} /* Baseboard */
> > +};
> > +
> > +int board_mmc_init(bd_t *bis)
> > +{
> > + struct src *psrc = (struct src *)SRC_BASE_ADDR;
> > + unsigned int reg = readl(&psrc->sbmr1) >> 11;
> > + /*
> > + * Upon reading BOOT_CFG register the following map is done:
> > + * Bit 11 and 12 of BOOT_CFG register can determine the
> > current
> > + * mmc port
> > + * 0x1 SD1-SOM
> > + * 0x2 SD2-Baseboard
> > + */
> > +
> > + reg &= 0x3; /* Only care about bottom 2 bits */
> > +
> > + switch (reg - 1) {
> > + case 0:
> > + SETUP_IOMUX_PADS(usdhc1_pads);
> > + usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR;
> > + usdhc_cfg[0].sdhc_clk =
> > mxc_get_clock(MXC_ESDHC_CLK);
> > + gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
> > + break;
> > + case 1:
> > + SETUP_IOMUX_PADS(usdhc2_pads);
> > + usdhc_cfg[1].esdhc_base = USDHC2_BASE_ADDR;
> > + usdhc_cfg[1].sdhc_clk =
> > mxc_get_clock(MXC_ESDHC2_CLK);
> > + gd->arch.sdhc_clk = usdhc_cfg[1].sdhc_clk;
> > + break;
> > + }
> > +
> > + return fsl_esdhc_initialize(bis, &usdhc_cfg[reg - 1]);
> > +}
> > +
> > +int board_mmc_getcd(struct mmc *mmc)
> > +{
> > + return 1;
> > +}
> > +#endif
> > +
> > static void ccgr_init(void)
> > {
> > struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg
> > *)CCM_BASE_ADDR; diff --git a/configs/imx6q_logic_defconfig
> > b/configs/imx6q_logic_defconfig index 036069a437..d0362665bb 100644
> > --- a/configs/imx6q_logic_defconfig
> > +++ b/configs/imx6q_logic_defconfig
> > @@ -4,25 +4,25 @@ CONFIG_SYS_TEXT_BASE=0x17800000
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > -CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_TARGET_MX6LOGICPD=y
> > +CONFIG_SPL_MMC_SUPPORT=y
> > CONFIG_SPL_SERIAL_SUPPORT=y
> > -CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
> > CONFIG_SPL=y
> > +CONFIG_SPL_FAT_SUPPORT=y
> > CONFIG_DISTRO_DEFAULTS=y
> > CONFIG_NR_DRAM_BANKS=1
> > -CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
> > CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
> > CONFIG_BOOTDELAY=3
> > # CONFIG_USE_BOOTCOMMAND is not set
> > CONFIG_SYS_CONSOLE_IS_IN_ENV=y
> > CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
> > -# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> > CONFIG_SPL_SEPARATE_BSS=y
> > +# CONFIG_TPL_BANNER_PRINT is not set
> > +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
> > CONFIG_SPL_DMA_SUPPORT=y
> > CONFIG_SPL_I2C_SUPPORT=y
> > CONFIG_SPL_NAND_SUPPORT=y
> > -CONFIG_SPL_OS_BOOT=y
> > +CONFIG_SPL_PAYLOAD="u-boot.img"
> > CONFIG_SPL_USB_HOST_SUPPORT=y
> > CONFIG_SPL_USB_GADGET_SUPPORT=y
> > CONFIG_SPL_USB_SDP_SUPPORT=y
> > @@ -47,11 +47,9 @@ CONFIG_CMD_MTDPARTS=y
> > CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
> > CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:2m(spl),2m(uboot),1m(env),16m(kernel),1m(dtb),-(fs)"
> > CONFIG_CMD_UBI=y
> > -CONFIG_SPL_OF_CONTROL=y
> > CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd"
> > CONFIG_ENV_IS_IN_NAND=y
> > CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> > -CONFIG_SPL_DM=y
> > CONFIG_PCF8575_GPIO=y
> > CONFIG_SYS_I2C_MXC=y
> > CONFIG_LED=y
> > @@ -64,7 +62,6 @@ CONFIG_PHY_ATHEROS=y
> > CONFIG_FEC_MXC=y
> > CONFIG_MII=y
> > CONFIG_PINCTRL=y
> > -CONFIG_SPL_PINCTRL=y
> > CONFIG_PINCTRL_IMX6=y
> > CONFIG_DM_PMIC_PFUZE100=y
> > CONFIG_MXC_UART=y
> > --
> > 2.17.1
> >
> _______________________________________________
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> https://lists.denx.de/listinfo/u-boot
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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