[U-Boot] [PATCH 1/6] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10
Chee, Tien Fong
tien.fong.chee at intel.com
Fri Jan 4 03:10:52 UTC 2019
On Fri, 2019-01-04 at 03:24 +0100, Marek Vasut wrote:
> On 1/4/19 3:22 AM, Chee, Tien Fong wrote:
> >
> > On Fri, 2019-01-04 at 03:10 +0100, Marek Vasut wrote:
> > >
> > > On 1/4/19 1:46 AM, Chee, Tien Fong wrote:
> > > [...]
> > >
> > > >
> > > >
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > > 2. What you means with partial loading? partial loading for
> > > > > > periph.rbf
> > > > > > or core.rbf or both rbfs?
> > > > > That you can only load the relevant image from the fitImage,
> > > > > not
> > > > > the
> > > > > entire fitImage, which lets you load the core bitstream in
> > > > > SPL.
> > > > So, you want 2 files periph.rbf.mkimage, and fitImage(contains
> > > > core.rbf) or both periph.rbf and core.rbf in one fitImage?
> > > Does it make sense ?
> > Which one you refer, 1 or 2?
> > 1. Two files => periph.rbf.mkimage, and fitImage(contains core.rbf)
> > in
> > FAT partition
> > 2. Both periph.rbf and core.rbf in one fitImage in FAT partition
> One fitImage file containing both .rbf files , stored in whatever
> storage the user needs.
Okay, let me explore feasibility of this kind implementation.
>
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