[U-Boot] rk3399 sdram data training read gate is looping forever

Jagan Teki jagan at amarulasolutions.com
Sat Jan 5 19:58:20 UTC 2019


Hi,

I'm trying to bring-up rk3399 SBC with 1GB DDR3 933MHZ capable, and
observed an sdram_init issue where data_training_rg transfer is
looping forever. The denali_pi[80], and denali_pi[74] seems to be
proper values while setting up the particular ranks.

Can anyone encounter similar issue? let me know for any inputs.

Log:

U-Boot SPL board init
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1 'root_driver'
   - not found
syscon: rockchip_rk3399_pmugrf 4
syscon: rockchip_rk3399_pmusgrf 5
syscon: rockchip_rk3399_cic 6
syscon: rockchip_rk3399_grf 1
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1 'rockchip_rk3399_pmugrf'
   - -1 -1 'rockchip_rk3399_pmusgrf'
   - -1 -1 'rockchip_rk3399_cic'
   - -1 -1 'rockchip_rk3399_grf'
   - not found
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1 'rockchip_rk3399_pmugrf'
   - -1 0 'rockchip_rk3399_pmusgrf'
   - found
uclass_find_device_by_seq: 0 1
   - -1 -1 'rockchip_rk3399_pmugrf'
   - -1 0 'rockchip_rk3399_pmusgrf'
   - -1 -1 'rockchip_rk3399_cic'
   - -1 -1 'rockchip_rk3399_grf'
   - not found
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1 'rockchip_rk3399_pinctrl'
   - not found
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1 'rockchip_rk3399_pmugrf'
   - -1 0 'rockchip_rk3399_pmusgrf'
   - found
uclass_find_device_by_seq: 0 1
   - -1 -1 'rockchip_rk3399_pmugrf'
   - -1 0 'rockchip_rk3399_pmusgrf'
   - -1 -1 'rockchip_rk3399_cic'
   - -1 1 'rockchip_rk3399_grf'
   - found
uclass_find_device_by_seq: 0 2
   - -1 -1 'rockchip_rk3399_pmugrf'
   - -1 0 'rockchip_rk3399_pmusgrf'
   - -1 -1 'rockchip_rk3399_cic'
   - -1 1 'rockchip_rk3399_grf'
   - not found
rk3399_pinctrl_probe: grf=ff770000, pmugrf=ff320000
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1 'rockchip_rk3399_dmc'
   - not found
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 2 'rockchip_rk3399_pmugrf'
   - -1 0 'rockchip_rk3399_pmusgrf'
   - found
uclass_find_device_by_seq: 0 1
   - -1 2 'rockchip_rk3399_pmugrf'
   - -1 0 'rockchip_rk3399_pmusgrf'
   - -1 -1 'rockchip_rk3399_cic'
   - -1 1 'rockchip_rk3399_grf'
   - found
uclass_find_device_by_seq: 0 2
   - -1 2 'rockchip_rk3399_pmugrf'
   - found
uclass_find_device_by_seq: 0 3
   - -1 2 'rockchip_rk3399_pmugrf'
   - -1 0 'rockchip_rk3399_pmusgrf'
   - -1 -1 'rockchip_rk3399_cic'
   - -1 1 'rockchip_rk3399_grf'
   - not found
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1 'rockchip_rk3399_cru'
   - -1 -1 'rockchip_rk3399_pmucru'
   - not found
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1 'rockchip_rk3399_cru'
   - -1 0 'rockchip_rk3399_pmucru'
   - found
uclass_find_device_by_seq: 0 1
   - -1 -1 'rockchip_rk3399_cru'
   - -1 0 'rockchip_rk3399_pmucru'
   - not found
PLL at ff760000: fbdiv=50, refdiv=1, postdiv1=2, postdiv2=1,
vco=1200000 khz, output=600000 khz
PLL at ff760020: fbdiv=50, refdiv=1, postdiv1=2, postdiv2=1,
vco=1200000 khz, output=600000 khz
PLL at ff760080: fbdiv=99, refdiv=2, postdiv1=2, postdiv2=1,
vco=1188000 khz, output=594000 khz
PLL at ff760060: fbdiv=64, refdiv=1, postdiv1=2, postdiv2=2,
vco=1536000 khz, output=384000 khz
con reg ffa80000 ffa80800 ffa82000 ffa84000 ffa88000 ffa88800 ffa8a000 ffa8c000
cru ff760000, cic ff620000, grf ff320000, sgrf ff330000, pmucru ff750000
clk_set_rate(clk=ff8ee498, rate=933000000)
PLL at ff760040: fbdiv=116, refdiv=1, postdiv1=3, postdiv2=1,
vco=2784000 khz, output=928000 khz
Starting SDRAM initialization...
freq 933, channnels 2
DRAM (pctl_cfg): phy locked after 1 ms
pctl_cfg done!
call data_training
call data_training_wl
data_training_wl while(1)
data_training_wl while(1)
call data_training_rg
data_training_rg while(1)
data_training_rg while(1)
data_training_rg while(1)
data_training_rg while(1)
data_training_rg while(1)
data_training_rg while(1)
data_training_rg while(1)
data_training_rg while(1)
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