[U-Boot] [PATCH 1/3] arm: socfpga: move legacy i2c defines to vining

[Simon Goldschmidt]

All socfpga boards exept for vining_fpga use DM_I2C. Move the non-DM
i2c defines from socfpga_common.h to socfpga_vining_fpga.h to prevent
i2c getting enabled for those boards when DM_I2C is deselected.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
---

 include/configs/socfpga_common.h      | 26 --------------------------
 include/configs/socfpga_vining_fpga.h | 24 ++++++++++++++++++++++++
 2 files changed, 24 insertions(+), 26 deletions(-)

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index bd8f5c8c41..087ed6e96d 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -137,32 +137,6 @@
 #define CONFIG_SYS_NAND_DATA_BASE	SOCFPGA_NANDDATA_ADDRESS
 #endif
 
-/*
- * I2C support
- */
-#ifndef CONFIG_DM_I2C
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_BASE		SOCFPGA_I2C0_ADDRESS
-#define CONFIG_SYS_I2C_BASE1		SOCFPGA_I2C1_ADDRESS
-#define CONFIG_SYS_I2C_BASE2		SOCFPGA_I2C2_ADDRESS
-#define CONFIG_SYS_I2C_BASE3		SOCFPGA_I2C3_ADDRESS
-/* Using standard mode which the speed up to 100Kb/s */
-#define CONFIG_SYS_I2C_SPEED		100000
-#define CONFIG_SYS_I2C_SPEED1		100000
-#define CONFIG_SYS_I2C_SPEED2		100000
-#define CONFIG_SYS_I2C_SPEED3		100000
-/* Address of device when used as slave */
-#define CONFIG_SYS_I2C_SLAVE		0x02
-#define CONFIG_SYS_I2C_SLAVE1		0x02
-#define CONFIG_SYS_I2C_SLAVE2		0x02
-#define CONFIG_SYS_I2C_SLAVE3		0x02
-#ifndef __ASSEMBLY__
-/* Clock supplied to I2C controller in unit of MHz */
-unsigned int cm_get_l4_sp_clk_hz(void);
-#define IC_CLK				(cm_get_l4_sp_clk_hz() / 1000000)
-#endif
-#endif /* CONFIG_DM_I2C */
-
 /*
  * QSPI support
  */
diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h
index 5517ed722d..2c6fee6ece 100644
--- a/include/configs/socfpga_vining_fpga.h
+++ b/include/configs/socfpga_vining_fpga.h
@@ -16,6 +16,30 @@
 #define CONFIG_LOADADDR		0x01000000
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
 
+/* I2C support */
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_BASE		SOCFPGA_I2C0_ADDRESS
+#define CONFIG_SYS_I2C_BASE1		SOCFPGA_I2C1_ADDRESS
+#define CONFIG_SYS_I2C_BASE2		SOCFPGA_I2C2_ADDRESS
+#define CONFIG_SYS_I2C_BASE3		SOCFPGA_I2C3_ADDRESS
+/* Using standard mode which the speed up to 100Kb/s */
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_SYS_I2C_SPEED1		100000
+#define CONFIG_SYS_I2C_SPEED2		100000
+#define CONFIG_SYS_I2C_SPEED3		100000
+/* Address of device when used as slave */
+#define CONFIG_SYS_I2C_SLAVE		0x02
+#define CONFIG_SYS_I2C_SLAVE1		0x02
+#define CONFIG_SYS_I2C_SLAVE2		0x02
+#define CONFIG_SYS_I2C_SLAVE3		0x02
+#ifndef __ASSEMBLY__
+/* Clock supplied to I2C controller in unit of MHz */
+unsigned int cm_get_l4_sp_clk_hz(void);
+#define IC_CLK				(cm_get_l4_sp_clk_hz() / 1000000)
+#endif
+#endif /* CONFIG_DM_I2C */
+
 /* I2C EEPROM */
 #ifdef CONFIG_CMD_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_ADDR		0x50
-- 
2.17.1