[U-Boot] [PATCH v2 1/3] net: designware: socfpga: adapt to Gen5

[Marek Vasut]

On 1/11/19 8:45 PM, Simon Goldschmidt wrote:
> This driver was written for Arria10, but it applies to Gen5, too.
> 
> The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
> syscon bits are encoded in the same register, thus an offset is needed.
> 
> This offset is already read from the devicetree, but for Arria10 it is
> always 0, which is probably why it has been ignored. By using this
> offset when writing the phy mode into the syscon regiter, we can use
> this driver to set the phy mode for both of the MACs on Gen5.
> 
> Since the PHY mode bits in sysmgr are the same even for Stratix10,
> let's drop the detection of the sub-mach by checking compatible
> version and just use the same code for all FPGAs.
> 
> To work correctly, this driver depends on SYSCON and REGMAP, so select
> those via Kconfig when it is enabeld.
> 
> Tested on socfpga_socrates (where the 2nd MAC is connected, so a shift
> offset is required).
> 
> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>

Acked-by: Marek Vasut <marex at denx.de>

-- 
Best regards,
Marek Vasut