[U-Boot] [PATCH v3 3/5] x86: dts: switch spi-flash to jedec, spi-nor compatible
Neil Armstrong
narmstrong at baylibre.com
Tue Jan 15 12:59:20 UTC 2019
The x86 code and DT uses "spi-flash" to detect a flash node, switch to
"jedec,spi-nor" in the DTS files and in fdtdec by switching the
GENERIC_SPI_FLASH value to to jedec,spi-nor.
Signed-off-by: Neil Armstrong <narmstrong at baylibre.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
---
arch/x86/dts/bayleybay.dts | 2 +-
arch/x86/dts/baytrail_som-db5800-som-6867.dts | 2 +-
arch/x86/dts/cherryhill.dts | 2 +-
arch/x86/dts/chromebook_link.dts | 2 +-
arch/x86/dts/chromebook_samus.dts | 2 +-
arch/x86/dts/chromebox_panther.dts | 2 +-
arch/x86/dts/conga-qeval20-qa3-e3845.dts | 2 +-
arch/x86/dts/cougarcanyon2.dts | 2 +-
arch/x86/dts/crownbay.dts | 2 +-
arch/x86/dts/dfi-bt700.dtsi | 2 +-
arch/x86/dts/galileo.dts | 2 +-
arch/x86/dts/minnowmax.dts | 2 +-
lib/fdtdec.c | 2 +-
13 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 291dc07ff6..d0168e88db 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -175,7 +175,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "winbond,w25q64dw",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
index 4e8a761ce8..5abbc66ce9 100644
--- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts
+++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
@@ -199,7 +199,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "macronix,mx25l6405d",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts
index 39e2d2fa4b..37146fde2b 100644
--- a/arch/x86/dts/cherryhill.dts
+++ b/arch/x86/dts/cherryhill.dts
@@ -147,7 +147,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
- compatible = "macronix,mx25u6435f", "spi-flash";
+ compatible = "macronix,mx25u6435f", "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index f9f0979730..fc9d156801 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -401,7 +401,7 @@
u-boot,dm-pre-reloc;
reg = <0>;
compatible = "winbond,w25q64",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts
index b58936b4ac..0866a72dc8 100644
--- a/arch/x86/dts/chromebook_samus.dts
+++ b/arch/x86/dts/chromebook_samus.dts
@@ -538,7 +538,7 @@
#address-cells = <1>;
reg = <0>;
compatible = "winbond,w25q64",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index f56e482944..bcd4c4d9c1 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -47,7 +47,7 @@
#address-cells = <1>;
reg = <0>;
compatible = "winbond,w25q64",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
index 5884dbc277..70b8c04519 100644
--- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
@@ -186,7 +186,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "stmicro,n25q064a",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts
index 9801790083..c6ba811e05 100644
--- a/arch/x86/dts/cougarcanyon2.dts
+++ b/arch/x86/dts/cougarcanyon2.dts
@@ -154,7 +154,7 @@
spi-flash at 0 {
reg = <0>;
- compatible = "winbond,w25q64bv", "spi-flash";
+ compatible = "winbond,w25q64bv", "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
};
};
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 2ffcc5f27e..f5b1ac66bc 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -223,7 +223,7 @@
spi-flash at 0 {
reg = <0>;
compatible = "sst,25vf016b",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xffe00000 0x00200000>;
};
};
diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi
index 51d33e772f..e9930cb043 100644
--- a/arch/x86/dts/dfi-bt700.dtsi
+++ b/arch/x86/dts/dfi-bt700.dtsi
@@ -197,7 +197,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "stmicro,n25q064a",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index 3a5d168268..5de4568679 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -139,7 +139,7 @@
#address-cells = <1>;
reg = <0>;
compatible = "winbond,w25q64",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 6c65fb9611..f4cdb2c3cd 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -199,7 +199,7 @@
#size-cells = <1>;
reg = <0>;
compatible = "stmicro,n25q064a",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 6f8ec0dbed..acb79bd80a 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -49,7 +49,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
- COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
+ COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
--
2.20.1
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