[U-Boot] [PATCH v2] travis: Wire Xilinx Versal Virt platform

[Michal Simek]

Test Xilinx Versal Virt platform running on the v3.1.0 Qemu.

Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---

Changes in v2:
- Rebased on the top of
  https://lists.denx.de/pipermail/u-boot/2019-January/354857.html

 .travis.yml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/.travis.yml b/.travis.yml
index 8991e12d6a1a..8daebdc8c157 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -448,6 +448,13 @@ matrix:
           QEMU_TARGET="arm-softmmu"
           TEST_PY_ID="--id qemu"
           BUILDMAN="^zynq_zc702$"
+    - name: "test/py xilinx_versal_virt"
+      env:
+        - TEST_PY_BD="xilinx_versal_virt"
+          TEST_PY_TEST_SPEC="not sleep"
+          QEMU_TARGET="aarch64-softmmu"
+          TEST_PY_ID="--id qemu"
+          BUILDMAN="^xilinx_versal_virt$"
     - name: "test/py xtfpga"
       env:
         - TEST_PY_BD="xtfpga"
-- 
1.9.1