[U-Boot] [PATCH 00/11] SiFive FU540 Support

[Anup Patel]

> -----Original Message-----
> From: Alexander Graf [mailto:agraf at suse.de]
> Sent: Friday, January 18, 2019 4:39 AM
> To: Anup Patel <Anup.Patel at wdc.com>; Rick Chen <rick at andestech.com>;
> Bin Meng <bmeng.cn at gmail.com>; Joe Hershberger
> <joe.hershberger at ni.com>; Lukas Auer <lukas.auer at aisec.fraunhofer.de>;
> Masahiro Yamada <yamada.masahiro at socionext.com>; Simon Glass
> <sjg at chromium.org>
> Cc: Palmer Dabbelt <palmer at sifive.com>; Paul Walmsley
> <paul.walmsley at sifive.com>; Atish Patra <Atish.Patra at wdc.com>;
> Christoph Hellwig <hch at infradead.org>; U-Boot Mailing List <u-
> boot at lists.denx.de>
> Subject: Re: [PATCH 00/11] SiFive FU540 Support
> 
> 
> 
> On 17.01.19 11:38, Anup Patel wrote:
> > This patchset adds SiFive Freedom Unleashed (FU540) support to RISC-V
> > U-Boot.
> >
> > The patches are based upon latest RISC-V U-Boot tree
> > (git://git.denx.de/u-boot-riscv.git) at commit id
> > 91882c472d8c0aef4db699d3f2de55bf43d4ae4b
> >
> > All drivers namely: SiFive PRCI, SiFive Serial, and Cadance MACB
> > Ethernet work fine on actual SiFive Unleashed board and QEMU sifive_u
> > machine.
> 
> Great job, looks very clean to me!

Thanks.

> 
> Slight nitpick on the SoB lines though. Usually your SoB should always come
> at the end if it went through your fingers last.
> 
> I saw a few patches where Atish was either the sole person in SoB or is listed
> after you in the SoB order. This is slightly incorrect, as you as the sender of
> the patch set should always occur at the end of the SoB list.

Sure, I will fix ordering of SoB

> 
> Thanks a lot for cooking up this patch set, I'm looking very much forward to a
> world where running new kernels is easy on RISC-V :).

Regards,
Anup