[U-Boot] [PATCH v2 13/19] rockchip: clk: Add mention of four new clocks
Simon Glass
sjg at chromium.org
Mon Jan 21 21:53:30 UTC 2019
These clocks are needed to get MMC running. We don't actually support
setting them yet.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
Changes in v2:
- Use correct printf format for log message
drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 198914b067..cab2bd9943 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -925,7 +925,13 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
case SCLK_SARADC:
rate = rk3399_saradc_get_clk(priv->cru);
break;
+ case ACLK_VIO:
+ case ACLK_HDCP:
+ case ACLK_GIC_PRE:
+ case PCLK_DDR:
+ break;
default:
+ log_debug("Unknown clock %lu\n", clk->id);
return -ENOENT;
}
@@ -993,7 +999,13 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
case SCLK_SARADC:
ret = rk3399_saradc_set_clk(priv->cru, rate);
break;
+ case ACLK_VIO:
+ case ACLK_HDCP:
+ case ACLK_GIC_PRE:
+ case PCLK_DDR:
+ return 0;
default:
+ log_debug("Unknown clock %lu\n", clk->id);
return -ENOENT;
}
--
2.20.1.321.g9e740568ce-goog
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