[U-Boot] [PATCH 1/3] fsl_sec: fix register layout on Layerscape architectures

Horia Geanta horia.geanta at nxp.com
Wed Jan 30 12:17:11 UTC 2019


On 1/30/2019 2:01 PM, laurentiu.tudor at nxp.com wrote:
> From: Laurentiu Tudor <laurentiu.tudor at nxp.com>
> 
> On Layerscape architectures the SEC memory map is 1MB and the
> register blocks contained in it are 64KB aligned, not 4KB as
> the ccsr_sec structure currently assumes. Fix the layout of
> the structure for these architectures.
> 
> Signed-off-by: Laurentiu Tudor <laurentiu.tudor at nxp.com>
For the series:
Reviewed-by: Horia Geantă <horia.geanta at nxp.com>

Thanks,
Horia


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