[U-Boot] [PATCH 0/3] PSCI support for r8a7790 SoC (Lager/Stout boards)
Oleksandr Tyshchenko
olekstysh at gmail.com
Thu Jan 31 17:38:26 UTC 2019
From: Oleksandr Tyshchenko <oleksandr_tyshchenko at epam.com>
Hi, all.
The purpose of this patch series is to add PSCI support for Renesas boards
based on R-Car Gen2 r8a7790 SoC. Actually, our target in Stout board, but as
Lager board is also based on the same SoC, that patch series covers both.
The main goal of using PSCI is to have common interface to boot CPUs
from Hypervisor/Linux. PSCI is a generic well-known way to bring-up CPU
and proven to work. With this patch series applied all CPUs will be switched to
a non-secure Hypervisor mode. For running Type 1 Hypervisor (e.g. Xen) it is
mandatory requirement. From other side, there are recommendation to boot Linux
in Hypervisor mode on ARM. This allows KVM or other Hypervisor (e.g. Jailhouse)
to be useable on the platform. If there are no Hypervisor present, Linux will
just initialize the Hypervisor mode correctly and drop to Supervisor mode.
Till now, we have been using a *custom solution* for running Xen Hypervisor
on Lager/Stout boards, which requires a specific U-Boot version (which performs
СPUs boot in a non-generic way) and different hacks into R-Car Gen2 platform
code in Linux. We have a situation where different methods are used in order
to boot CPUs from Xen/Linux. Which results in a forced switching between different
U-Boot versions, when we need to switch between bare Linux and Xen,
which is quite inconvenient. This should be totally transparent to the user.
----------
Current patch series is based on the following commit:
425c0a43fbbec36571f6a03b530695b8b16a841d “Prepare v2019.01-rc3”
It was tested with bare Linux 5.0.0-rc3 and Xen 4.12.0-rc with Linux 5.0.0-rc3
as guest OS. Everything worked as expected.
In case of bare Linux, all CPU cores started in HYP mode and PSCI checker
confirmed that hotplug tests had successfully passed.
Just one note. For each secondary CPU boot, Linux complains about
“Spectre v2: firmware did not set auxiliary control register IBE bit,
system vulnerable”.
Probably because the corresponding ARM errata (CONFIG_ARM_CORTEX_A15_CVE_2017_5715, etc)
is not propagated to non-boot (secondary) CPUs.
You can also find patch series here (last 3 patches):
https://github.com/otyshchenko1/u-boot/commits/r8a7790_psci_upstream
----------
Please note:
1. Current patch series implies corresponding changes to Linux.
You can find them here (last 2 patches):
https://github.com/otyshchenko1/linux/commits/psci_upstream
I am about to push them as well.
2. As PSCI code expects a bigger “Maximum supported CPUs for PSCI” value (8)
than default option (4), you will get a compilation error:
arch/arm/mach-rmobile/psci.c:21:2: error: #error "invalid value for CONFIG_ARMV7_PSCI_NR_CPUS"
#error "invalid value for CONFIG_ARMV7_PSCI_NR_CPUS"
To resolve it, just run make menuconfig, set this option to 8
(or change in .config directly) and recompile.
----------
Oleksandr Tyshchenko (3):
ARM: rmobile: Switch CPU to non-secure HYP mode for r8a7790 based
boards
ARM: rmobile: Add basic PSCI support for r8a7790 SoC
ARM: rmobile: Add possibility to debug main PSCI commands
arch/arm/mach-rmobile/Kconfig.32 | 6 +
arch/arm/mach-rmobile/Makefile | 6 +
arch/arm/mach-rmobile/debug.h | 91 +++++++++
arch/arm/mach-rmobile/pm-r8a7790.c | 408 +++++++++++++++++++++++++++++++++++++
arch/arm/mach-rmobile/pm-r8a7790.h | 72 +++++++
arch/arm/mach-rmobile/psci.c | 216 ++++++++++++++++++++
board/renesas/lager/lager.c | 51 +++++
board/renesas/stout/stout.c | 51 +++++
include/configs/lager.h | 5 +
include/configs/stout.h | 5 +
10 files changed, 911 insertions(+)
create mode 100644 arch/arm/mach-rmobile/debug.h
create mode 100644 arch/arm/mach-rmobile/pm-r8a7790.c
create mode 100644 arch/arm/mach-rmobile/pm-r8a7790.h
create mode 100644 arch/arm/mach-rmobile/psci.c
--
2.7.4
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