[U-Boot] [PATCH 25/52] imx8m: soc: enable SCTR clock before timer init

[peng.fan at nxp.com]

From: Peng Fan <peng.fan at nxp.com>

To i.MX8MM SCTR clock is disabled by ROM, so before timer init
need to enable it.
To i.MX8MQ, it does not hurt the clock is enabled again.

Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
 arch/arm/mach-imx/imx8m/soc.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 5b7300087d..c4d842f097 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -235,6 +235,12 @@ static void imx_set_wdog_powerdown(bool enable)
 int arch_cpu_init(void)
 {
 	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+	/*
+	 * ROM might disable clock for SCTR,
+	 * enable the clock before timer_init.
+	 */
+	if (IS_ENABLED(CONFIG_SPL_BUILD))
+		clock_enable(CCGR_SCTR, 1);
 	/*
 	 * Init timer at very early state, because sscg pll setting
 	 * will use it
-- 
2.16.4