[U-Boot] [PATCH v2 5/7] riscv: cache: Flush L2 cache before jump to linux

[Andes]

From: Rick Chen <rick at andestech.com>

Flush and disable cache in cleanup_before_linux()
which will be called before jump to linux.

The sequence will be preferred as below:
L1 flush -> L1 disable -> L2 flush -> L2 disable

Signed-off-by: Rick Chen <rick at andestech.com>
Cc: Greentime Hu <greentime at andestech.com>
Cc: KC Lin <kclin at andestech.com>
---
 arch/riscv/cpu/ax25/cpu.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/ax25/cpu.c
index 76689b2..31a714e 100644
--- a/arch/riscv/cpu/ax25/cpu.c
+++ b/arch/riscv/cpu/ax25/cpu.c
@@ -7,6 +7,29 @@
 /* CPU specific code */
 #include <common.h>
 #include <asm/cache.h>
+#include <dm.h>
+#include <dm/uclass-internal.h>
+#include <cache.h>
+
+void enable_v5l2(void)
+{
+	struct udevice *dev = NULL;
+
+	uclass_find_first_device(UCLASS_CACHE, &dev);
+
+	if (dev)
+		cache_enable(dev);
+}
+
+void disable_v5l2(void)
+{
+	struct udevice *dev = NULL;
+
+	uclass_find_first_device(UCLASS_CACHE, &dev);
+
+	if (dev)
+		cache_disable(dev);
+}
 
 /*
  * cleanup_before_linux() is called just before we call linux
@@ -22,6 +45,9 @@ int cleanup_before_linux(void)
 	cache_flush();
 	icache_disable();
 	dcache_disable();
+#ifdef CONFIG_RISCV_NDS_CACHE
+	disable_v5l2();
+#endif
 
 	return 0;
 }
-- 
2.7.4