[U-Boot] [RESEND PATCH v2 01/15] arm: socfpga: agilex: Add base address for Intel Agilex SoC

[Simon Goldschmidt]

Am 04.07.2019 um 10:55 schrieb Ley Foon Tan:
> Add base address for Intel Agilex SoC.
> 
> Reuse base_addr_s10.h for Agilex, only one base address is
> different from S10.
> 
> Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>

Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>

> 
> ---
> v2:
> - Reuse base_addr_s10.h and add #ifdef Agilex for SOCFPGA_FW_MPU_DDR_SCR_ADDRESS
> ---
>   arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
> index 1f549d7e70..d3eca65e97 100644
> --- a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
> +++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
> @@ -10,7 +10,11 @@
>   #define SOCFPGA_SDR_SCHEDULER_ADDRESS		0xf8000400
>   #define SOCFPGA_HMC_MMR_IO48_ADDRESS		0xf8010000
>   #define SOCFPGA_SDR_ADDRESS			0xf8011000
> +#ifdef CONFIG_TARGET_SOCFPGA_AGILEX
> +#define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS		0xf8020200
> +#else
>   #define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS		0xf8020100
> +#endif
>   #define SOCFPGA_SMMU_ADDRESS			0xfa000000
>   #define SOCFPGA_MAILBOX_ADDRESS			0xffa30000
>   #define SOCFPGA_UART0_ADDRESS			0xffc02000
>