[U-Boot] [RESEND PATCH v2 00/15] Add Intel Agilex SoC support

Wed Jul 10 12:36:20 UTC 2019

On Tue, Jul 09, 2019 at 09:35:32PM +0200, Simon Goldschmidt wrote:

> Tom, Marek,
> 
> I'd like to assign these patches to me in patchwork but failed to do so.
> Does anyone need to add me there as co-custodian for socfpga?

Yes, I need your patchwork user name and I'll get you added to the
project, thanks!

> 
> Thanks,
> Simon
> 
> Am 04.07.2019 um 10:55 schrieb Ley Foon Tan:
> >This is 2nd version of patchset (RESEND) to add Intel Agilex SoC[1] support.
> >This patchset needs to apply after patch in [2] for Designware i2c clock from DM.
> >
> >Patch 1, 5, 6, 7, 8, 13, 14, 15 have changed, the rest have not.
> >*Patch 7 is new patch for clock manager driver with DM.
> >Detail change log is in patch commit message.
> >
> >Intel Agilex SoC is with a 64-bit quad core ARM Cortex-A53 MPCore
> >hard processor system (HPS). New IPs in Agilex are CCU, clock manager and SDRAM,
> >other IPs have minor changes compared to Stratix 10.
> >
> >Intel Agilex HPS TRM:
> >https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/agilex/mnl-1100.pdf
> >
> >v1->v2:
> >-------
> >- Change clock driver to DM
> >- Reuse base_addr_s10.h from S10
> >- Add system_manager_s10_agilex_common.h
> >- Update commit message for CCU patch
> >- Update Linux commit id in dts/dtsi patch
> >
> >History:
> >---------
> >[v1]: https://patchwork.ozlabs.org/cover/1097830/
> >
> >[1]: https://www.intel.com/content/www/us/en/products/programmable/fpga/agilex.html
> >[2]: https://patchwork.ozlabs.org/patch/1114251/
> >
> >Ley Foon Tan (15):
> >   arm: socfpga: agilex: Add base address for Intel Agilex SoC
> >   arm: socfpga: Move firewall code to firewall file
> >   arm: socfpga: Move Stratix10 and Agilex reset manager common code
> >   arm: socfpga: agilex: Add reset manager support
> >   arm: socfpga: Move Stratix10 and Agilex system manager common code
> >   arm: socfpga: agilex: Add system manager support
> >   clk: agilex: Add clock driver for Agilex.
> >   arm: socfpga: agilex: Add clock manager support
> >   arm: socfpga: agilex: Add CCU support for Agilex
> >   ddr: altera: Restructure Stratix 10 SDRAM driver
> >   ddr: altera: agilex: Add SDRAM driver for Agilex
> >   board: intel: agilex: Add socdk board support for Intel Agilex SoC
> >   arm: socfpga: agilex: Add SPL for Agilex SoC
> >   arm: dts: agilex: Add base dtsi and devkit dts
> >   arm: socfpga: agilex: Enable Agilex SoC build
> >
> >  arch/arm/Kconfig                              |   4 +-
> >  arch/arm/dts/Makefile                         |   1 +
> >  arch/arm/dts/socfpga_agilex.dtsi              | 495 +++++++++++++++
> >  arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi |  71 +++
> >  arch/arm/dts/socfpga_agilex_socdk.dts         | 136 +++++
> >  arch/arm/mach-socfpga/Kconfig                 |  15 +
> >  arch/arm/mach-socfpga/Makefile                |  18 +
> >  arch/arm/mach-socfpga/ccu_agilex.c            |  99 +++
> >  arch/arm/mach-socfpga/clock_manager_agilex.c  |  87 +++
> >  arch/arm/mach-socfpga/firewall.c              |  97 +++
> >  .../mach-socfpga/include/mach/base_addr_s10.h |   4 +
> >  .../mach-socfpga/include/mach/ccu_agilex.h    |  67 +++
> >  .../mach-socfpga/include/mach/clock_manager.h |   2 +
> >  .../include/mach/clock_manager_agilex.h       | 329 ++++++++++
> >  .../mach/{firewall_s10.h => firewall.h}       |  10 +-
> >  .../mach-socfpga/include/mach/reset_manager.h |  29 +
> >  .../include/mach/reset_manager_agilex.h       |  38 ++
> >  .../include/mach/reset_manager_s10.h          |  79 ---
> >  .../include/mach/system_manager.h             |   2 +
> >  ..._manager_s10.h => system_manager_agilex.h} |  89 +--
> >  .../include/mach/system_manager_s10.h         |  46 +-
> >  .../mach/system_manager_s10_agilex_common.h   |  60 ++
> >  arch/arm/mach-socfpga/reset_manager.c         |   9 +-
> >  arch/arm/mach-socfpga/spl_agilex.c            | 100 +++
> >  arch/arm/mach-socfpga/spl_s10.c               |  84 +--
> >  board/intel/agilex-socdk/MAINTAINERS          |   7 +
> >  board/intel/agilex-socdk/Makefile             |   7 +
> >  board/intel/agilex-socdk/socfpga.c            |   7 +
> >  configs/socfpga_agilex_defconfig              |  57 ++
> >  drivers/clk/altera/Makefile                   |   1 +
> >  drivers/clk/altera/clk-agilex.c               | 568 ++++++++++++++++++
> >  drivers/ddr/altera/Kconfig                    |   6 +-
> >  drivers/ddr/altera/Makefile                   |   3 +-
> >  drivers/ddr/altera/sdram_agilex.c             | 158 +++++
> >  drivers/ddr/altera/sdram_common.c             | 308 ++++++++++
> >  .../altera/{sdram_s10.h => sdram_common.h}    |  75 +--
> >  drivers/ddr/altera/sdram_s10.c                | 302 +---------
> >  drivers/ddr/altera/sdram_s10.h                | 148 -----
> >  include/configs/socfpga_agilex_socdk.h        | 208 +++++++
> >  include/dt-bindings/clock/stratix10-clock.h   |  84 +++
> >  40 files changed, 3140 insertions(+), 770 deletions(-)
> >  create mode 100644 arch/arm/dts/socfpga_agilex.dtsi
> >  create mode 100644 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
> >  create mode 100644 arch/arm/dts/socfpga_agilex_socdk.dts
> >  create mode 100644 arch/arm/mach-socfpga/ccu_agilex.c
> >  create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex.c
> >  create mode 100644 arch/arm/mach-socfpga/firewall.c
> >  create mode 100644 arch/arm/mach-socfpga/include/mach/ccu_agilex.h
> >  create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h
> >  rename arch/arm/mach-socfpga/include/mach/{firewall_s10.h => firewall.h} (94%)
> >  create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
> >  copy arch/arm/mach-socfpga/include/mach/{system_manager_s10.h => system_manager_agilex.h} (51%)
> >  create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10_agilex_common.h
> >  create mode 100644 arch/arm/mach-socfpga/spl_agilex.c
> >  create mode 100644 board/intel/agilex-socdk/MAINTAINERS
> >  create mode 100644 board/intel/agilex-socdk/Makefile
> >  create mode 100644 board/intel/agilex-socdk/socfpga.c
> >  create mode 100644 configs/socfpga_agilex_defconfig
> >  create mode 100644 drivers/clk/altera/clk-agilex.c
> >  create mode 100644 drivers/ddr/altera/sdram_agilex.c
> >  create mode 100644 drivers/ddr/altera/sdram_common.c
> >  copy drivers/ddr/altera/{sdram_s10.h => sdram_common.h} (78%)
> >  create mode 100644 include/configs/socfpga_agilex_socdk.h
> >  create mode 100644 include/dt-bindings/clock/stratix10-clock.h
> >
> 

-- 
Tom
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