[U-Boot] [PATCH v7 7/9] riscv: sifive: fu540: Setup ethaddr env variable using OTP
Anup Patel
Anup.Patel at wdc.com
Thu Jul 11 04:28:59 UTC 2019
> -----Original Message-----
> From: Troy Benjegerdes <troy.benjegerdes at sifive.com>
> Sent: Wednesday, July 10, 2019 10:45 PM
> To: Anup Patel <Anup.Patel at wdc.com>; Sagar Karandikar
> <sagar.karandikar at sifive.com>; Joey Hewitt <joey at joeyhewitt.com>
> Cc: Rick Chen <rick at andestech.com>; Bin Meng <bmeng.cn at gmail.com>;
> Lukas Auer <lukas.auer at aisec.fraunhofer.de>; Simon Glass
> <sjg at chromium.org>; Ramon Fried <rfried.dev at gmail.com>; Joe
> Hershberger <joe.hershberger at ni.com>; Palmer Dabbelt
> <palmer at sifive.com>; Paul Walmsley <paul.walmsley at sifive.com>; Atish
> Patra <Atish.Patra at wdc.com>; Alistair Francis <Alistair.Francis at wdc.com>;
> U-Boot Mailing List <u-boot at lists.denx.de>
> Subject: Re: [PATCH v7 7/9] riscv: sifive: fu540: Setup ethaddr env variable
> using OTP
>
>
>
> > On Jun 23, 2019, at 11:03 PM, Anup Patel <Anup.Patel at wdc.com> wrote:
> >
> > This patch extends SiFive FU540 board support to setup ethaddr env
> > variable based on board serialnum read from OTP.
> >
> > Signed-off-by: Anup Patel <anup.patel at wdc.com>
> > ---
> > board/sifive/fu540/fu540.c | 122
> +++++++++++++++++++++++++++++++++
> > configs/sifive_fu540_defconfig | 1 +
> > 2 files changed, 123 insertions(+)
> >
> > diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
> > index 5adc4a3d4a..11daf1a75a 100644
> > --- a/board/sifive/fu540/fu540.c
> > +++ b/board/sifive/fu540/fu540.c
> > @@ -8,6 +8,128 @@
> >
> > #include <common.h>
> > #include <dm.h>
> > +#include <linux/delay.h>
> > +#include <linux/io.h>
> > +
> > +#ifdef CONFIG_MISC_INIT_R
> > +
> > +#define FU540_OTP_BASE_ADDR 0x10070000
> > +
> > +struct fu540_otp_regs {
> > + u32 pa; /* Address input */
> > + u32 paio; /* Program address input */
> > + u32 pas; /* Program redundancy cell selection input */
> > + u32 pce; /* OTP Macro enable input */
> > + u32 pclk; /* Clock input */
> > + u32 pdin; /* Write data input */
> > + u32 pdout; /* Read data output */
> > + u32 pdstb; /* Deep standby mode enable input (active low) */
> > + u32 pprog; /* Program mode enable input */
> > + u32 ptc; /* Test column enable input */
> > + u32 ptm; /* Test mode enable input */
> > + u32 ptm_rep;/* Repair function test mode enable input */
> > + u32 ptr; /* Test row enable input */
> > + u32 ptrim; /* Repair function enable input */
> > + u32 pwe; /* Write enable input (defines program cycle) */
> > +} __packed;
> > +
> > +#define BYTES_PER_FUSE 4
> > +#define NUM_FUSES 0x1000
> > +
> > +static int fu540_otp_read(int offset, void *buf, int size) {
> > + struct fu540_otp_regs *regs = (void __iomem
> *)FU540_OTP_BASE_ADDR;
> > + unsigned int i;
> > + int fuseidx = offset / BYTES_PER_FUSE;
> > + int fusecount = size / BYTES_PER_FUSE;
> > + u32 fusebuf[fusecount];
> > +
> > + /* check bounds */
> > + if (offset < 0 || size < 0)
> > + return -EINVAL;
> > + if (fuseidx >= NUM_FUSES)
> > + return -EINVAL;
> > + if ((fuseidx + fusecount) > NUM_FUSES)
> > + return -EINVAL;
> > +
> > + /* init OTP */
> > + writel(0x01, ®s->pdstb); /* wake up from stand-by */
> > + writel(0x01, ®s->ptrim); /* enable repair function */
> > + writel(0x01, ®s->pce); /* enable input */
> > +
> > + /* read all requested fuses */
> > + for (i = 0; i < fusecount; i++, fuseidx++) {
> > + writel(fuseidx, ®s->pa);
> > +
> > + /* cycle clock to read */
> > + writel(0x01, ®s->pclk);
> > + mdelay(1);
> > + writel(0x00, ®s->pclk);
> > + mdelay(1);
> > +
> > + /* read the value */
> > + fusebuf[i] = readl(®s->pdout);
> > + }
> > +
> > + /* shut down */
> > + writel(0, ®s->pce);
> > + writel(0, ®s->ptrim);
> > + writel(0, ®s->pdstb);
> > +
> > + /* copy out */
> > + memcpy(buf, fusebuf, size);
> > +
> > + return 0;
> > +}
> > +
> > +static u32 fu540_read_serialnum(void) {
> > + int ret;
> > + u32 serial[2] = {0};
> > +
> > + for (int i = 0xfe * 4; i > 0; i -= 8) {
> > + ret = fu540_otp_read(i, serial, sizeof(serial));
> > + if (ret) {
> > + printf("%s: error reading from OTP\n", __func__);
> > + break;
> > + }
> > + if (serial[0] == ~serial[1])
> > + return serial[0];
> > + }
> > +
> > + return 0;
> > +}
>
> Please take a look at the DM-enabled SiFive OTP driver submitted by Joey
> Hewitt at https://github.com/sifive/HiFive_U-
> Boot/commit/6d842765de142b61f847852da7a9ce0d081d770c
>
> This Joey's version also sets the ‘serial#’ environment variable, while this
> patch only sets ‘ethaddr'
I am not sure if "serial#" environment variable is a standard U-Boot
way of advertising serial number of underlying Host.
Where is this used?
Regards,
Anup
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