[U-Boot] [PATCH v9 6/9] net: macb: Extend MACB driver for SiFive Unleashed board

Anup Patel anup at brainfault.org
Sun Jul 14 04:05:05 UTC 2019


On Tue, Jun 25, 2019 at 12:43 PM Ramon Fried <rfried.dev at gmail.com> wrote:
>
>
> On 6/25/2019 09:31, Anup Patel wrote:
> > The SiFive MACB ethernet has a custom TX_CLK_SEL register to select
> > different TX clock for 1000mbps vs 10/100mbps.
> >
> > This patch adds SiFive MACB compatible string and extends the MACB
> > ethernet driver to change TX clock using TX_CLK_SEL register for
> > SiFive MACB.
> >
> > Signed-off-by: Anup Patel <anup.patel at wdc.com>
> > Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
> > ---
> >   drivers/net/macb.c | 70 +++++++++++++++++++++++++++++++++++-----------
> >   1 file changed, 53 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/net/macb.c b/drivers/net/macb.c
> > index c072f99d8f..322302762a 100644
> > --- a/drivers/net/macb.c
> > +++ b/drivers/net/macb.c
> > @@ -83,7 +83,8 @@ struct macb_dma_desc {
> >
> >   struct macb_device {
> >       void                    *regs;
> > -     unsigned int            dma_burst_length;
> > +
> > +     const struct macb_config*config;
> >
> >       unsigned int            rx_tail;
> >       unsigned int            tx_head;
> > @@ -123,6 +124,8 @@ struct macb_device {
> >
> >   struct macb_config {
> >       unsigned int            dma_burst_length;
> > +
> > +     int                     (*clk_init)(struct udevice *dev, ulong rate);
> >   };
> >
> >   #ifndef CONFIG_DM_ETH
> > @@ -483,21 +486,38 @@ static int macb_phy_find(struct macb_device *macb, const char *name)
> >    * when operation failed.
> >    */
> >   #ifdef CONFIG_DM_ETH
> > +static int macb_sifive_clk_init(struct udevice *dev, ulong rate)
> > +{
> > +     fdt_addr_t addr;
> > +     void *gemgxl_regs;
> > +
> > +     addr = dev_read_addr_index(dev, 1);
> > +     if (addr == FDT_ADDR_T_NONE)
> > +             return -ENODEV;
> > +
> > +     gemgxl_regs = (void __iomem *)addr;
> > +     if (!gemgxl_regs)
> > +             return -ENODEV;
> > +
> > +     /*
> > +      * SiFive GEMGXL TX clock operation mode:
> > +      *
> > +      * 0 = GMII mode. Use 125 MHz gemgxlclk from PRCI in TX logic
> > +      *     and output clock on GMII output signal GTX_CLK
> > +      * 1 = MII mode. Use MII input signal TX_CLK in TX logic
> > +      */
> > +     writel(rate != 125000000, gemgxl_regs);
> > +     return 0;
> > +}
> > +
> >   int __weak macb_linkspd_cb(struct udevice *dev, unsigned int speed)
> >   {
> >   #ifdef CONFIG_CLK
> > +     struct macb_device *macb = dev_get_priv(dev);
> >       struct clk tx_clk;
> >       ulong rate;
> >       int ret;
> >
> > -     /*
> > -      * "tx_clk" is an optional clock source for MACB.
> > -      * Ignore if it does not exist in DT.
> > -      */
> > -     ret = clk_get_by_name(dev, "tx_clk", &tx_clk);
> > -     if (ret)
> > -             return 0;
> > -
> >       switch (speed) {
> >       case _10BASET:
> >               rate = 2500000;         /* 2.5 MHz */
> > @@ -513,6 +533,17 @@ int __weak macb_linkspd_cb(struct udevice *dev, unsigned int speed)
> >               return 0;
> >       }
> >
> > +     if (macb->config->clk_init)
> > +             return macb->config->clk_init(dev, rate);
> > +
> > +     /*
> > +      * "tx_clk" is an optional clock source for MACB.
> > +      * Ignore if it does not exist in DT.
> > +      */
> > +     ret = clk_get_by_name(dev, "tx_clk", &tx_clk);
> > +     if (ret)
> > +             return 0;
> > +
> >       if (tx_clk.dev) {
> >               ret = clk_set_rate(&tx_clk, rate);
> >               if (ret)
> > @@ -705,8 +736,9 @@ static void gmac_configure_dma(struct macb_device *macb)
> >       dmacfg = gem_readl(macb, DMACFG) & ~GEM_BF(RXBS, -1L);
> >       dmacfg |= GEM_BF(RXBS, buffer_size);
> >
> > -     if (macb->dma_burst_length)
> > -             dmacfg = GEM_BFINS(FBLDO, macb->dma_burst_length, dmacfg);
> > +     if (macb->config->dma_burst_length)
> > +             dmacfg = GEM_BFINS(FBLDO,
> > +                                macb->config->dma_burst_length, dmacfg);
> >
> >       dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);
> >       dmacfg &= ~GEM_BIT(ENDIA_PKT);
> > @@ -1173,11 +1205,10 @@ static const struct macb_config default_gem_config = {
> >
> >   static int macb_eth_probe(struct udevice *dev)
> >   {
> > -     const struct macb_config *macb_config;
> >       struct eth_pdata *pdata = dev_get_platdata(dev);
> >       struct macb_device *macb = dev_get_priv(dev);
> >       const char *phy_mode;
> > -     __maybe_unused int ret;
> > +     int ret;
> >
> >       phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
> >                              NULL);
> > @@ -1190,11 +1221,10 @@ static int macb_eth_probe(struct udevice *dev)
> >
> >       macb->regs = (void *)pdata->iobase;
> >
> > -     macb_config = (struct macb_config *)dev_get_driver_data(dev);
> > -     if (!macb_config)
> > -             macb_config = &default_gem_config;
> > +     macb->config = (struct macb_config *)dev_get_driver_data(dev);
> > +     if (!macb->config)
> > +             macb->config = &default_gem_config;
> >
> > -     macb->dma_burst_length = macb_config->dma_burst_length;
> >   #ifdef CONFIG_CLK
> >       ret = macb_enable_clk(dev);
> >       if (ret)
> > @@ -1259,6 +1289,11 @@ static const struct macb_config sama5d4_config = {
> >       .dma_burst_length = 4,
> >   };
> >
> > +static const struct macb_config sifive_config = {
> > +     .dma_burst_length = 16,
> > +     .clk_init = macb_sifive_clk_init,
> > +};
> > +
> >   static const struct udevice_id macb_eth_ids[] = {
> >       { .compatible = "cdns,macb" },
> >       { .compatible = "cdns,at91sam9260-macb" },
> > @@ -1266,6 +1301,7 @@ static const struct udevice_id macb_eth_ids[] = {
> >       { .compatible = "atmel,sama5d3-gem" },
> >       { .compatible = "atmel,sama5d4-gem", .data = (ulong)&sama5d4_config },
> >       { .compatible = "cdns,zynq-gem" },
> > +     { .compatible = "sifive,fu540-macb", .data = (ulong)&sifive_config },
> >       { }
> >   };
> >
>
> Reviewed-By: Ramon Fried <rfried.dev at gmail.com>
>
>
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Hi Joe,

Can you consider this patch for v2019.10 ?

Regards,
Anup


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