[U-Boot] [PATCH v2 1/4] rockchip: clk: rk3399: handle clk_enable requests for USB3【请注意，邮件由u-boot-bounces at lists.denx.de代发】

[Kever Yang]

On 2019/7/2 上午10:05, Kever Yang wrote:
> Hi Mark,
>
>
> On 07/01/2019 12:01 AM, Mark Kettenis wrote:
>> The "simple" OF glue layer for the Designware USB3 core enables
>> all refernced clocks.  These need to be need to be implemented
>> otherwise the driver fails to probe.  A dummy implementation
>> that simply returns success is sufficient since the RK3399 comes
>> out of reset with all clock gates open.
>>
>> Signed-off-by: Mark Kettenis <kettenis at openbsd.org>
> Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Applied to u-boot-rockchip.

Thanks,
- Kever
>
> Thanks,
> - Kever
>
>> ---
>>   drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++
>>   1 file changed, 12 insertions(+)
>>
>> diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
>> index 79007b8682..d9950c159b 100644
>> --- a/drivers/clk/rockchip/clk_rk3399.c
>> +++ b/drivers/clk/rockchip/clk_rk3399.c
>> @@ -1080,6 +1080,18 @@ static int rk3399_clk_enable(struct clk *clk)
>>   	case PCLK_GMAC:
>>   		/* Required to successfully probe the Designware GMAC driver */
>>   		return 0;
>> +
>> +	case SCLK_USB3OTG0_REF:
>> +	case SCLK_USB3OTG1_REF:
>> +	case SCLK_USB3OTG0_SUSPEND:
>> +	case SCLK_USB3OTG1_SUSPEND:
>> +	case ACLK_USB3OTG0:
>> +	case ACLK_USB3OTG1:
>> +	case ACLK_USB3_RKSOC_AXI_PERF:
>> +	case ACLK_USB3:
>> +	case ACLK_USB3_GRF:
>> +		/* Required to successfully probe the Designware USB3 driver */
>> +		return 0;
>>   	}
>>   
>>   	debug("%s: unsupported clk %ld\n", __func__, clk->id);
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