[U-Boot] [PATCH v4 1/4] arm: socfpga: rst: add register definition for cold reset

[Simon Goldschmidt]

This adds a define for the bit in rstmgr's ctrl regiser that issues
a cold reset (we had a define for the warm reset bit only) in preparation
for a proper sysrese driver.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
Series changes: 2
- separate this patch to the register descriptions from the actual
  sysreset driver patch
---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 42beaecdd6..6ad037e325 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -11,6 +11,7 @@ void reset_cpu(ulong addr);
 void socfpga_per_reset(u32 reset, int set);
 void socfpga_per_reset_all(void);
 
+#define RSTMGR_CTRL_SWCOLDRSTREQ_LSB 0
 #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
 
 /*
-- 
2.20.1