[U-Boot] [PATCH v3 18/18] rockchip: dts: rk3399: nanopi-neo4: Use DDR3-1866 dtsi
Kever Yang
kever.yang at rock-chips.com
Tue Jul 16 07:47:48 UTC 2019
On 2019/7/16 上午2:28, Jagan Teki wrote:
> Use DDR3-1866 2GB ddr timings dtsi for 1GB NanoPi Neo4 board.
>
> Since sdram rk3399 support dynamic stride and rank detection it
> can able to detect 1GB ddr eventough the timings are meant for
> dual channel, 2GB size.
>
> Bootchain after and before this change are:
>
> TPL -> SPL -> U-Boot proper
>
> rkbin -> SPL -> U-Boot proper
>
> This certainly fix the second channel data training initialization
> since we have dynamic rank, stride where second channel capabilities
> are clear or memset to 0.
>
> Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi
> index 7d22528f49..eb0aca4758 100644
> --- a/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi
> @@ -4,3 +4,4 @@
> */
>
> #include "rk3399-nanopi4-u-boot.dtsi"
> +#include "rk3399-sdram-ddr3-1866.dtsi"
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