[U-Boot] [PATCH v3 26/57] ram: rk3399: Configure PHY_898, PHY_919 for lpddr4
Kever Yang
kever.yang at rock-chips.com
Tue Jul 16 13:12:49 UTC 2019
On 2019/7/16 下午7:57, Jagan Teki wrote:
> PHY_898, PHY_919 would require to configure PHY LP4 boot
> pll control and ca for lpddr4.
>
> So, configure the same in pctl_cfg for LPDDR4.
>
> Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
> Signed-off-by: YouMin Chen <cym at rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> drivers/ram/rockchip/sdram_rk3399.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
> index beb4f6de54..7625506458 100644
> --- a/drivers/ram/rockchip/sdram_rk3399.c
> +++ b/drivers/ram/rockchip/sdram_rk3399.c
> @@ -574,6 +574,11 @@ static int pctl_cfg(struct dram_info *dram, const struct chan_info *chan,
> writel(params->phy_regs.denali_phy[911], &denali_phy[911]);
> writel(params->phy_regs.denali_phy[912], &denali_phy[912]);
>
> + if (IS_ENABLED(CONFIG_RAM_RK3399_LPDDR4)) {
> + writel(params->phy_regs.denali_phy[898], &denali_phy[898]);
> + writel(params->phy_regs.denali_phy[919], &denali_phy[919]);
> + }
> +
> dram->pwrup_srefresh_exit[channel] = readl(&denali_ctl[68]) &
> PWRUP_SREFRESH_EXIT;
> clrbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT);
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