[U-Boot] [PATCH v5 1/8] x86: Add new slimbootloader CPU type
Park, Aiden
aiden.park at intel.com
Wed Jul 17 04:41:02 UTC 2019
This slimbootloader cpu type is to enable U-Boot as a payload which
runs on top of Slim Bootloader(https://github.com/slimbootloader).
The Slim Bootloader is designed with multi-stage architecture for
the execution from reset vector to OS booting, and supports qemu,
Apollolake, Whiskeylake and Coffeelake platforms consuming Intel FSP
(https://github.com/IntelFsp) for silicon initialization including
CAR and memory initialization.
The Slim Bootloader generates new HOB(Hand Off Block) which are
serial port info, memory map info, performance data info and so on,
and passes it to a Payload. U-Boot as a payload will use these HOB
information for basic initialization such as serial console.
As an initial commit,
- Add CONFIG_SYS_SLIMBOOTLOADER to enable slimbootloader CPU type
- Add new arch/x86/cpu/slimbootloader directory with minimum codes
- Get hob_list pointer from Slim Bootloader
Signed-off-by: Aiden Park <aiden.park at intel.com>
Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
---
Changes in v4:
* Use common arch/x86/cpu/start.S
* Update U-boot or u-boot to U-Boot in commit message
Changes in v3:
* Add a brief description about Slim Bootloader
* Enable USB_KEYBOARD, E1000 and RTL8169 by default
* Fix comment from code review
arch/x86/Kconfig | 1 +
arch/x86/cpu/Makefile | 1 +
arch/x86/cpu/slimbootloader/Kconfig | 26 +++++++++++++++++++
arch/x86/cpu/slimbootloader/Makefile | 5 ++++
arch/x86/cpu/slimbootloader/car.S | 14 ++++++++++
arch/x86/cpu/slimbootloader/slimbootloader.c | 21 +++++++++++++++
arch/x86/cpu/start.S | 6 +++--
.../asm/arch-slimbootloader/slimbootloader.h | 11 ++++++++
arch/x86/include/asm/global_data.h | 2 +-
arch/x86/lib/asm-offsets.c | 2 +-
10 files changed, 85 insertions(+), 4 deletions(-)
create mode 100644 arch/x86/cpu/slimbootloader/Kconfig
create mode 100644 arch/x86/cpu/slimbootloader/Makefile
create mode 100644 arch/x86/cpu/slimbootloader/car.S
create mode 100644 arch/x86/cpu/slimbootloader/slimbootloader.c
create mode 100644 arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 70f939869a..27b7b767b9 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -115,6 +115,7 @@ source "arch/x86/cpu/efi/Kconfig"
source "arch/x86/cpu/qemu/Kconfig"
source "arch/x86/cpu/quark/Kconfig"
source "arch/x86/cpu/queensbay/Kconfig"
+source "arch/x86/cpu/slimbootloader/Kconfig"
source "arch/x86/cpu/tangier/Kconfig"
# architecture-specific options below
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 85fd5e616e..3f1f62da2b 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
obj-$(CONFIG_INTEL_BRASWELL) += braswell/
obj-$(CONFIG_INTEL_BROADWELL) += broadwell/
obj-$(CONFIG_SYS_COREBOOT) += coreboot/
+obj-$(CONFIG_SYS_SLIMBOOTLOADER) += slimbootloader/
obj-$(CONFIG_EFI) += efi/
obj-$(CONFIG_QEMU) += qemu/
obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
diff --git a/arch/x86/cpu/slimbootloader/Kconfig b/arch/x86/cpu/slimbootloader/Kconfig
new file mode 100644
index 0000000000..439e4b1e2c
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/Kconfig
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+if TARGET_SLIMBOOTLOADER
+
+config SYS_SLIMBOOTLOADER
+ bool
+ default y
+ imply SYS_NS16550
+ imply AHCI_PCI
+ imply SCSI
+ imply SCSI_AHCI
+ imply MMC
+ imply MMC_PCI
+ imply MMC_SDHCI
+ imply MMC_SDHCI_SDMA
+ imply USB
+ imply USB_EHCI_HCD
+ imply USB_XHCI_HCD
+ imply USB_STORAGE
+ imply USB_KEYBOARD
+ imply E1000
+ imply RTL8169
+
+endif
diff --git a/arch/x86/cpu/slimbootloader/Makefile b/arch/x86/cpu/slimbootloader/Makefile
new file mode 100644
index 0000000000..627a721e8c
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+obj-y += car.o slimbootloader.o
diff --git a/arch/x86/cpu/slimbootloader/car.S b/arch/x86/cpu/slimbootloader/car.S
new file mode 100644
index 0000000000..6e0304333c
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/car.S
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <generated/asm-offsets.h>
+
+.section .text
+
+.globl car_init
+car_init:
+ /* Get hob pointer parameter from previous stage's stack */
+ mov 0x4(%esp), %esi
+ jmp car_init_ret
diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c
new file mode 100644
index 0000000000..9f3a61ec61
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/slimbootloader.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+
+int arch_cpu_init(void)
+{
+ return x86_cpu_init_f();
+}
+
+int checkcpu(void)
+{
+ return 0;
+}
+
+int print_cpuinfo(void)
+{
+ return default_print_cpuinfo();
+}
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 4a82add76b..26436e9f0a 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -97,7 +97,7 @@ early_board_init_ret:
jmp car_init
.globl car_init_ret
car_init_ret:
-#ifndef CONFIG_HAVE_FSP
+#if !defined(CONFIG_HAVE_FSP) && !defined(CONFIG_SYS_SLIMBOOTLOADER)
/*
* We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
* or fully initialised SDRAM - we really don't care which)
@@ -137,12 +137,13 @@ car_init_ret:
/* Get address of global_data */
mov %fs:0, %edx
-#ifdef CONFIG_HAVE_FSP
+#if defined(CONFIG_HAVE_FSP) || defined(CONFIG_SYS_SLIMBOOTLOADER)
/* Store the HOB list if we have one */
test %esi, %esi
jz skip_hob
movl %esi, GD_HOB_LIST(%edx)
+#ifdef CONFIG_HAVE_FSP
/*
* After fsp_init() returns, the stack has already been switched to a
* place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
@@ -151,6 +152,7 @@ car_init_ret:
*/
subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
movl %esp, GD_MALLOC_BASE(%edx)
+#endif
skip_hob:
#else
/* Store table pointer */
diff --git a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
new file mode 100644
index 0000000000..7309a83724
--- /dev/null
+++ b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#ifndef __SLIMBOOTLOADER_ARCH_H__
+#define __SLIMBOOTLOADER_ARCH_H__
+
+#include <common.h>
+
+#endif
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 9398ec33b2..674efaaa01 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -83,7 +83,7 @@ struct arch_global_data {
const struct pch_gpio_map *gpio_map; /* board GPIO map */
struct memory_info meminfo; /* Memory information */
struct pei_memory_info pei_meminfo; /* PEI memory information */
-#ifdef CONFIG_HAVE_FSP
+#if defined(CONFIG_HAVE_FSP) || defined(CONFIG_SYS_SLIMBOOTLOADER)
void *hob_list; /* FSP HOB list */
#endif
struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS];
diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c
index 90dce22b25..258c0bbc2c 100644
--- a/arch/x86/lib/asm-offsets.c
+++ b/arch/x86/lib/asm-offsets.c
@@ -17,7 +17,7 @@
int main(void)
{
DEFINE(GD_BIST, offsetof(gd_t, arch.bist));
-#ifdef CONFIG_HAVE_FSP
+#if defined(CONFIG_HAVE_FSP) || defined(CONFIG_SYS_SLIMBOOTLOADER)
DEFINE(GD_HOB_LIST, offsetof(gd_t, arch.hob_list));
#endif
DEFINE(GD_TABLE, offsetof(gd_t, arch.table));
--
2.20.1
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