[U-Boot] [PATCH RESEND 05/14] i.MX7ULP: Fix PCC register bits mask and offset issue

[Peng Fan]

From: Ye Li <ye.li at nxp.com>

The offset for FRAC and the mask for PCD are not correct.
If we set FRAC, we can't get the right frequency. Fix them
to correct value.

Signed-off-by: Ye Li <ye.li at nxp.com>
Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
 arch/arm/include/asm/arch-mx7ulp/pcc.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx7ulp/pcc.h b/arch/arm/include/asm/arch-mx7ulp/pcc.h
index 67a0936150..dee3cfcdc0 100644
--- a/arch/arm/include/asm/arch-mx7ulp/pcc.h
+++ b/arch/arm/include/asm/arch-mx7ulp/pcc.h
@@ -289,10 +289,10 @@ enum pcc3_entry {
 #define PCC_INUSE_MASK		(0x1 << PCC_INUSE_OFFSET)
 #define PCC_PCS_OFFSET	24
 #define PCC_PCS_MASK	(0x7 << PCC_PCS_OFFSET)
-#define PCC_FRAC_OFFSET	4
+#define PCC_FRAC_OFFSET	3
 #define PCC_FRAC_MASK	(0x1 << PCC_FRAC_OFFSET)
 #define PCC_PCD_OFFSET	0
-#define PCC_PCD_MASK	(0xf << PCC_PCD_OFFSET)
+#define PCC_PCD_MASK	(0x7 << PCC_PCD_OFFSET)
 
 
 enum pcc_clksrc_type {
-- 
2.16.4