[U-Boot] [PATCH v6 1/8] x86: Add new slimbootloader CPU type
Park, Aiden
aiden.park at intel.com
Fri Jul 26 07:00:00 UTC 2019
This slimbootloader CPU type is to enable U-Boot as a payload which
runs on top of Slim Bootloader(https://github.com/slimbootloader).
The Slim Bootloader is designed with multi-stage architecture for
the execution from reset vector to OS booting, and supports QEMU,
Apollolake, Whiskeylake and Coffeelake platforms consuming Intel FSP
(https://github.com/IntelFsp) for silicon initialization including
CAR and memory initialization.
The Slim Bootloader generates new HOB(Hand Off Block) which are
serial port info, memory map info, performance data info and so on,
and passes it to a Payload. U-Boot as a payload will use these HOB
information for basic initialization such as serial console.
As an initial commit,
- Add CONFIG_SYS_SLIMBOOTLOADER to enable slimbootloader CPU type
- Add new arch/x86/cpu/slimbootloader directory with minimum codes
- Get hob_list pointer from Slim Bootloader
Signed-off-by: Aiden Park <aiden.park at intel.com>
Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
---
Changes in v6:
* Add CONFIG_USE_HOB
* Move some CONFIGs to board Kconfig
* Remove arch-slimbootloader/slimbooloader.h
* Apply code-review comments
Changes in v4:
* Use common arch/x86/cpu/start.S
* Update U-boot or u-boot to U-Boot in commit message
Changes in v3:
* Add a brief description about Slim Bootloader
* Enable USB_KEYBOARD, E1000 and RTL8169 by default
* Fix comment from code review
arch/x86/Kconfig | 9 +++++++++
arch/x86/cpu/Makefile | 1 +
arch/x86/cpu/slimbootloader/Kconfig | 19 ++++++++++++++++++
arch/x86/cpu/slimbootloader/Makefile | 5 +++++
arch/x86/cpu/slimbootloader/car.S | 14 +++++++++++++
arch/x86/cpu/slimbootloader/slimbootloader.c | 21 ++++++++++++++++++++
arch/x86/cpu/start.S | 6 ++++--
arch/x86/include/asm/global_data.h | 2 +-
arch/x86/lib/asm-offsets.c | 2 +-
9 files changed, 75 insertions(+), 4 deletions(-)
create mode 100644 arch/x86/cpu/slimbootloader/Kconfig
create mode 100644 arch/x86/cpu/slimbootloader/Makefile
create mode 100644 arch/x86/cpu/slimbootloader/car.S
create mode 100644 arch/x86/cpu/slimbootloader/slimbootloader.c
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 70f939869a..b3a37c5529 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -115,6 +115,7 @@ source "arch/x86/cpu/efi/Kconfig"
source "arch/x86/cpu/qemu/Kconfig"
source "arch/x86/cpu/quark/Kconfig"
source "arch/x86/cpu/queensbay/Kconfig"
+source "arch/x86/cpu/slimbootloader/Kconfig"
source "arch/x86/cpu/tangier/Kconfig"
# architecture-specific options below
@@ -344,9 +345,17 @@ config INTEL_ME_FILE
The filename of the file to use as Intel Management Engine in the
board directory.
+config USE_HOB
+ bool "Use HOB(Hand-Off Block)"
+ help
+ Select this option to access HOB(Hand-Off Block) data structures
+ and parse HOBs. This HOB infra structure can be reused with
+ different solutions across different platforms.
+
config HAVE_FSP
bool "Add an Firmware Support Package binary"
depends on !EFI
+ select USE_HOB
help
Select this option to add an Firmware Support Package binary to
the resulting U-Boot image. It is a binary blob which U-Boot uses
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 85fd5e616e..3f1f62da2b 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
obj-$(CONFIG_INTEL_BRASWELL) += braswell/
obj-$(CONFIG_INTEL_BROADWELL) += broadwell/
obj-$(CONFIG_SYS_COREBOOT) += coreboot/
+obj-$(CONFIG_SYS_SLIMBOOTLOADER) += slimbootloader/
obj-$(CONFIG_EFI) += efi/
obj-$(CONFIG_QEMU) += qemu/
obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
diff --git a/arch/x86/cpu/slimbootloader/Kconfig b/arch/x86/cpu/slimbootloader/Kconfig
new file mode 100644
index 0000000000..3ea4c9958c
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/Kconfig
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+config SYS_SLIMBOOTLOADER
+ bool
+ select USE_HOB
+ imply SYS_NS16550
+ imply AHCI_PCI
+ imply SCSI
+ imply SCSI_AHCI
+ imply MMC
+ imply MMC_PCI
+ imply MMC_SDHCI
+ imply MMC_SDHCI_SDMA
+ imply USB
+ imply USB_EHCI_HCD
+ imply USB_XHCI_HCD
+ imply E1000
diff --git a/arch/x86/cpu/slimbootloader/Makefile b/arch/x86/cpu/slimbootloader/Makefile
new file mode 100644
index 0000000000..627a721e8c
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+obj-y += car.o slimbootloader.o
diff --git a/arch/x86/cpu/slimbootloader/car.S b/arch/x86/cpu/slimbootloader/car.S
new file mode 100644
index 0000000000..6e0304333c
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/car.S
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <generated/asm-offsets.h>
+
+.section .text
+
+.globl car_init
+car_init:
+ /* Get hob pointer parameter from previous stage's stack */
+ mov 0x4(%esp), %esi
+ jmp car_init_ret
diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c
new file mode 100644
index 0000000000..9f3a61ec61
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/slimbootloader.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+
+int arch_cpu_init(void)
+{
+ return x86_cpu_init_f();
+}
+
+int checkcpu(void)
+{
+ return 0;
+}
+
+int print_cpuinfo(void)
+{
+ return default_print_cpuinfo();
+}
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 4a82add76b..71cd70f9cd 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -97,7 +97,7 @@ early_board_init_ret:
jmp car_init
.globl car_init_ret
car_init_ret:
-#ifndef CONFIG_HAVE_FSP
+#ifndef CONFIG_USE_HOB
/*
* We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
* or fully initialised SDRAM - we really don't care which)
@@ -137,12 +137,13 @@ car_init_ret:
/* Get address of global_data */
mov %fs:0, %edx
-#ifdef CONFIG_HAVE_FSP
+#ifdef CONFIG_USE_HOB
/* Store the HOB list if we have one */
test %esi, %esi
jz skip_hob
movl %esi, GD_HOB_LIST(%edx)
+#ifdef CONFIG_HAVE_FSP
/*
* After fsp_init() returns, the stack has already been switched to a
* place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
@@ -151,6 +152,7 @@ car_init_ret:
*/
subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
movl %esp, GD_MALLOC_BASE(%edx)
+#endif
skip_hob:
#else
/* Store table pointer */
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 9398ec33b2..797397e697 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -83,7 +83,7 @@ struct arch_global_data {
const struct pch_gpio_map *gpio_map; /* board GPIO map */
struct memory_info meminfo; /* Memory information */
struct pei_memory_info pei_meminfo; /* PEI memory information */
-#ifdef CONFIG_HAVE_FSP
+#ifdef CONFIG_USE_HOB
void *hob_list; /* FSP HOB list */
#endif
struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS];
diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c
index 90dce22b25..47b38cd9e7 100644
--- a/arch/x86/lib/asm-offsets.c
+++ b/arch/x86/lib/asm-offsets.c
@@ -17,7 +17,7 @@
int main(void)
{
DEFINE(GD_BIST, offsetof(gd_t, arch.bist));
-#ifdef CONFIG_HAVE_FSP
+#ifdef CONFIG_USE_HOB
DEFINE(GD_HOB_LIST, offsetof(gd_t, arch.hob_list));
#endif
DEFINE(GD_TABLE, offsetof(gd_t, arch.table));
--
2.20.1
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