[U-Boot] [PATCH v2 3/3] configs: update rk3288 veyron defconfigs
Kever Yang
kever.yang at rock-chips.com
Fri Jul 26 07:33:12 UTC 2019
Urja Rannikko <urjaman at gmail.com> 于2019年5月13日周一 下午9:52写道：
> Updates jerry, mickey, minnie and speedy defconfigs to:
> - fit the SPL in 32k
> - boot from SPI (only)
> - remove gadget support (these have no OTG port)
>
> Reviewed-by: Simon Glass <sjg at chromium.org>
> Signed-off-by: Urja Rannikko <urjaman at gmail.com>
>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> v2: Rebase, include previous reviewed-by
> ---
> configs/chromebit_mickey_defconfig | 25 ++++++++++++++++---------
> configs/chromebook_jerry_defconfig | 25 ++++++++++++++++---------
> configs/chromebook_minnie_defconfig | 25 ++++++++++++++++---------
> configs/chromebook_speedy_defconfig | 25 ++++++++++++++-----------
> 4 files changed, 62 insertions(+), 38 deletions(-)
>
> diff --git a/configs/chromebit_mickey_defconfig
> b/configs/chromebit_mickey_defconfig
> index 1b2cca8812..12dc690bca 100644
> --- a/configs/chromebit_mickey_defconfig
> +++ b/configs/chromebit_mickey_defconfig
> @@ -1,4 +1,5 @@
> CONFIG_ARM=y
> +# CONFIG_SPL_USE_ARCH_MEMCPY is not set
> CONFIG_ARCH_ROCKCHIP=y
> CONFIG_SYS_TEXT_BASE=0x00100000
> CONFIG_SYS_MALLOC_F_LEN=0x2000
> @@ -17,8 +18,12 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb"
> # CONFIG_DISPLAY_CPUINFO is not set
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> CONFIG_SPL_TEXT_BASE=0xff704000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> CONFIG_SPL_STACK_R=y
> CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
> +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
> +# CONFIG_SPL_CRC32_SUPPORT is not set
> +CONFIG_SPL_PAYLOAD="u-boot.img"
> CONFIG_SPL_SPI_LOAD=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_GPT=y
> @@ -39,16 +44,15 @@ CONFIG_SPL_PARTITION_UUIDS=y
> CONFIG_SPL_OF_CONTROL=y
> CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey"
> CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names
> interrupt-parent assigned-clocks assigned-clock-rates
> assigned-clock-parents"
> +CONFIG_SPL_OF_PLATDATA=y
> CONFIG_REGMAP=y
> CONFIG_SPL_REGMAP=y
> CONFIG_SYSCON=y
> CONFIG_SPL_SYSCON=y
> # CONFIG_SPL_SIMPLE_BUS is not set
> +# CONFIG_SPL_BLK is not set
> CONFIG_CLK=y
> CONFIG_SPL_CLK=y
> -CONFIG_FASTBOOT_FLASH=y
> -CONFIG_FASTBOOT_FLASH_MMC_DEV=0
> -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
> CONFIG_ROCKCHIP_GPIO=y
> CONFIG_I2C_CROS_EC_TUNNEL=y
> CONFIG_SYS_I2C_ROCKCHIP=y
> @@ -58,13 +62,18 @@ CONFIG_CROS_EC_KEYB=y
> CONFIG_CROS_EC=y
> CONFIG_CROS_EC_SPI=y
> CONFIG_PWRSEQ=y
> +# CONFIG_SPL_DM_MMC is not set
> CONFIG_MMC_DW=y
> CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_SPI_FLASH=y
> +CONFIG_SF_DEFAULT_BUS=2
> CONFIG_SF_DEFAULT_SPEED=20000000
> CONFIG_SPI_FLASH_GIGADEVICE=y
> CONFIG_PINCTRL=y
> +CONFIG_PINCONF=y
> CONFIG_SPL_PINCTRL=y
> +# CONFIG_SPL_PINMUX is not set
> +CONFIG_SPL_PINCONF=y
> CONFIG_DM_PMIC=y
> # CONFIG_SPL_PMIC_CHILDREN is not set
> CONFIG_PMIC_RK8XX=y
> @@ -78,17 +87,15 @@ CONFIG_DEBUG_UART_SHIFT=2
> CONFIG_ROCKCHIP_SPI=y
> CONFIG_SYSRESET=y
> CONFIG_USB=y
> +# CONFIG_SPL_DM_USB is not set
> +CONFIG_USB_DWC2=y
> CONFIG_ROCKCHIP_USB2_PHY=y
> -CONFIG_USB_GADGET=y
> -CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
> -CONFIG_USB_GADGET_VENDOR_NUM=0x2207
> -CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
> -CONFIG_USB_GADGET_DWC2_OTG=y
> -CONFIG_USB_FUNCTION_MASS_STORAGE=y
> CONFIG_DM_VIDEO=y
> +# CONFIG_VIDEO_BPP8 is not set
> CONFIG_DISPLAY=y
> CONFIG_VIDEO_ROCKCHIP=y
> CONFIG_DISPLAY_ROCKCHIP_HDMI=y
> CONFIG_USE_TINY_PRINTF=y
> +CONFIG_SPL_TINY_MEMSET=y
> CONFIG_CMD_DHRYSTONE=y
> CONFIG_ERRNO_STR=y
> diff --git a/configs/chromebook_jerry_defconfig
> b/configs/chromebook_jerry_defconfig
> index f8c9c5fd9a..f25fd73cc6 100644
> --- a/configs/chromebook_jerry_defconfig
> +++ b/configs/chromebook_jerry_defconfig
> @@ -1,4 +1,5 @@
> CONFIG_ARM=y
> +# CONFIG_SPL_USE_ARCH_MEMCPY is not set
> CONFIG_ARCH_ROCKCHIP=y
> CONFIG_SYS_TEXT_BASE=0x00100000
> CONFIG_SYS_MALLOC_F_LEN=0x2000
> @@ -20,8 +21,12 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb"
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> CONFIG_BOARD_EARLY_INIT_F=y
> CONFIG_SPL_TEXT_BASE=0xff704000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> CONFIG_SPL_STACK_R=y
> CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
> +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
> +# CONFIG_SPL_CRC32_SUPPORT is not set
> +CONFIG_SPL_PAYLOAD="u-boot.img"
> CONFIG_SPL_SPI_LOAD=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_GPT=y
> @@ -43,16 +48,15 @@ CONFIG_SPL_PARTITION_UUIDS=y
> CONFIG_SPL_OF_CONTROL=y
> CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
> CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names
> interrupt-parent assigned-clocks assigned-clock-rates
> assigned-clock-parents"
> +CONFIG_SPL_OF_PLATDATA=y
> CONFIG_REGMAP=y
> CONFIG_SPL_REGMAP=y
> CONFIG_SYSCON=y
> CONFIG_SPL_SYSCON=y
> # CONFIG_SPL_SIMPLE_BUS is not set
> +# CONFIG_SPL_BLK is not set
> CONFIG_CLK=y
> CONFIG_SPL_CLK=y
> -CONFIG_FASTBOOT_FLASH=y
> -CONFIG_FASTBOOT_FLASH_MMC_DEV=0
> -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
> CONFIG_ROCKCHIP_GPIO=y
> CONFIG_I2C_CROS_EC_TUNNEL=y
> CONFIG_SYS_I2C_ROCKCHIP=y
> @@ -62,13 +66,18 @@ CONFIG_CROS_EC_KEYB=y
> CONFIG_CROS_EC=y
> CONFIG_CROS_EC_SPI=y
> CONFIG_PWRSEQ=y
> +# CONFIG_SPL_DM_MMC is not set
> CONFIG_MMC_DW=y
> CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_SPI_FLASH=y
> +CONFIG_SF_DEFAULT_BUS=2
> CONFIG_SF_DEFAULT_SPEED=20000000
> CONFIG_SPI_FLASH_GIGADEVICE=y
> CONFIG_PINCTRL=y
> +CONFIG_PINCONF=y
> CONFIG_SPL_PINCTRL=y
> +# CONFIG_SPL_PINMUX is not set
> +CONFIG_SPL_PINCONF=y
> CONFIG_DM_PMIC=y
> # CONFIG_SPL_PMIC_CHILDREN is not set
> CONFIG_PMIC_RK8XX=y
> @@ -84,14 +93,11 @@ CONFIG_I2S_ROCKCHIP=y
> CONFIG_ROCKCHIP_SPI=y
> CONFIG_SYSRESET=y
> CONFIG_USB=y
> +# CONFIG_SPL_DM_USB is not set
> +CONFIG_USB_DWC2=y
> CONFIG_ROCKCHIP_USB2_PHY=y
> -CONFIG_USB_GADGET=y
> -CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
> -CONFIG_USB_GADGET_VENDOR_NUM=0x2207
> -CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
> -CONFIG_USB_GADGET_DWC2_OTG=y
> -CONFIG_USB_FUNCTION_MASS_STORAGE=y
> CONFIG_DM_VIDEO=y
> +# CONFIG_VIDEO_BPP8 is not set
> CONFIG_CONSOLE_TRUETYPE=y
> CONFIG_DISPLAY=y
> CONFIG_VIDEO_ROCKCHIP=y
> @@ -99,5 +105,6 @@ CONFIG_DISPLAY_ROCKCHIP_EDP=y
> CONFIG_DISPLAY_ROCKCHIP_HDMI=y
> # CONFIG_USE_PRIVATE_LIBGCC is not set
> CONFIG_USE_TINY_PRINTF=y
> +CONFIG_SPL_TINY_MEMSET=y
> CONFIG_CMD_DHRYSTONE=y
> CONFIG_ERRNO_STR=y
> diff --git a/configs/chromebook_minnie_defconfig
> b/configs/chromebook_minnie_defconfig
> index 4f6750dcb2..2e7a3ee6d7 100644
> --- a/configs/chromebook_minnie_defconfig
> +++ b/configs/chromebook_minnie_defconfig
> @@ -1,4 +1,5 @@
> CONFIG_ARM=y
> +# CONFIG_SPL_USE_ARCH_MEMCPY is not set
> CONFIG_ARCH_ROCKCHIP=y
> CONFIG_SYS_TEXT_BASE=0x00100000
> CONFIG_SYS_MALLOC_F_LEN=0x2000
> @@ -18,8 +19,12 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb"
> # CONFIG_DISPLAY_CPUINFO is not set
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> CONFIG_SPL_TEXT_BASE=0xff704000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> CONFIG_SPL_STACK_R=y
> CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
> +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
> +# CONFIG_SPL_CRC32_SUPPORT is not set
> +CONFIG_SPL_PAYLOAD="u-boot.img"
> CONFIG_SPL_SPI_LOAD=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_GPT=y
> @@ -41,16 +46,15 @@ CONFIG_SPL_PARTITION_UUIDS=y
> CONFIG_SPL_OF_CONTROL=y
> CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
> CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names
> interrupt-parent assigned-clocks assigned-clock-rates
> assigned-clock-parents"
> +CONFIG_SPL_OF_PLATDATA=y
> CONFIG_REGMAP=y
> CONFIG_SPL_REGMAP=y
> CONFIG_SYSCON=y
> CONFIG_SPL_SYSCON=y
> # CONFIG_SPL_SIMPLE_BUS is not set
> +# CONFIG_SPL_BLK is not set
> CONFIG_CLK=y
> CONFIG_SPL_CLK=y
> -CONFIG_FASTBOOT_FLASH=y
> -CONFIG_FASTBOOT_FLASH_MMC_DEV=0
> -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
> CONFIG_ROCKCHIP_GPIO=y
> CONFIG_I2C_CROS_EC_TUNNEL=y
> CONFIG_SYS_I2C_ROCKCHIP=y
> @@ -60,13 +64,18 @@ CONFIG_CROS_EC_KEYB=y
> CONFIG_CROS_EC=y
> CONFIG_CROS_EC_SPI=y
> CONFIG_PWRSEQ=y
> +# CONFIG_SPL_DM_MMC is not set
> CONFIG_MMC_DW=y
> CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_SPI_FLASH=y
> +CONFIG_SF_DEFAULT_BUS=2
> CONFIG_SF_DEFAULT_SPEED=20000000
> CONFIG_SPI_FLASH_GIGADEVICE=y
> CONFIG_PINCTRL=y
> +CONFIG_PINCONF=y
> CONFIG_SPL_PINCTRL=y
> +# CONFIG_SPL_PINMUX is not set
> +CONFIG_SPL_PINCONF=y
> CONFIG_DM_PMIC=y
> # CONFIG_SPL_PMIC_CHILDREN is not set
> CONFIG_PMIC_RK8XX=y
> @@ -83,19 +92,17 @@ CONFIG_SOUND_MAX98090=y
> CONFIG_ROCKCHIP_SPI=y
> CONFIG_SYSRESET=y
> CONFIG_USB=y
> +# CONFIG_SPL_DM_USB is not set
> +CONFIG_USB_DWC2=y
> CONFIG_ROCKCHIP_USB2_PHY=y
> -CONFIG_USB_GADGET=y
> -CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
> -CONFIG_USB_GADGET_VENDOR_NUM=0x2207
> -CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
> -CONFIG_USB_GADGET_DWC2_OTG=y
> -CONFIG_USB_FUNCTION_MASS_STORAGE=y
> CONFIG_DM_VIDEO=y
> +# CONFIG_VIDEO_BPP8 is not set
> CONFIG_DISPLAY=y
> CONFIG_VIDEO_ROCKCHIP=y
> CONFIG_DISPLAY_ROCKCHIP_EDP=y
> CONFIG_DISPLAY_ROCKCHIP_HDMI=y
> CONFIG_CONSOLE_SCROLL_LINES=10
> CONFIG_USE_TINY_PRINTF=y
> +CONFIG_SPL_TINY_MEMSET=y
> CONFIG_CMD_DHRYSTONE=y
> CONFIG_ERRNO_STR=y
> diff --git a/configs/chromebook_speedy_defconfig
> b/configs/chromebook_speedy_defconfig
> index f1e258e1fb..c1c668a863 100644
> --- a/configs/chromebook_speedy_defconfig
> +++ b/configs/chromebook_speedy_defconfig
> @@ -1,4 +1,5 @@
> CONFIG_ARM=y
> +# CONFIG_SPL_USE_ARCH_MEMCPY is not set
> CONFIG_ARCH_ROCKCHIP=y
> CONFIG_SYS_TEXT_BASE=0x00100000
> CONFIG_SYS_MALLOC_F_LEN=0x2000
> @@ -19,8 +20,12 @@ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> CONFIG_BOARD_EARLY_INIT_F=y
> CONFIG_SPL_TEXT_BASE=0xff704000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> CONFIG_SPL_STACK_R=y
> CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
> +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
> +# CONFIG_SPL_CRC32_SUPPORT is not set
> +CONFIG_SPL_PAYLOAD="u-boot.img"
> CONFIG_SPL_SPI_LOAD=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_GPT=y
> @@ -47,11 +52,9 @@ CONFIG_SPL_REGMAP=y
> CONFIG_SYSCON=y
> CONFIG_SPL_SYSCON=y
> # CONFIG_SPL_SIMPLE_BUS is not set
> +# CONFIG_SPL_BLK is not set
> CONFIG_CLK=y
> CONFIG_SPL_CLK=y
> -CONFIG_FASTBOOT_FLASH=y
> -CONFIG_FASTBOOT_FLASH_MMC_DEV=0
> -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
> CONFIG_ROCKCHIP_GPIO=y
> CONFIG_I2C_CROS_EC_TUNNEL=y
> CONFIG_SYS_I2C_ROCKCHIP=y
> @@ -61,13 +64,16 @@ CONFIG_CROS_EC_KEYB=y
> CONFIG_CROS_EC=y
> CONFIG_CROS_EC_SPI=y
> CONFIG_PWRSEQ=y
> +# CONFIG_SPL_DM_MMC is not set
> CONFIG_MMC_DW=y
> CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SF_DEFAULT_BUS=2
> CONFIG_SF_DEFAULT_SPEED=20000000
> CONFIG_SPI_FLASH_GIGADEVICE=y
> CONFIG_PINCTRL=y
> +CONFIG_PINCONF=y
> CONFIG_SPL_PINCTRL=y
> -# CONFIG_SPL_PINCTRL_FULL is not set
> CONFIG_DM_PMIC=y
> # CONFIG_SPL_PMIC_CHILDREN is not set
> CONFIG_PMIC_RK8XX=y
> @@ -81,14 +87,11 @@ CONFIG_ROCKCHIP_SERIAL=y
> CONFIG_ROCKCHIP_SPI=y
> CONFIG_SYSRESET=y
> CONFIG_USB=y
> +# CONFIG_SPL_DM_USB is not set
> +CONFIG_USB_DWC2=y
> CONFIG_ROCKCHIP_USB2_PHY=y
> -CONFIG_USB_GADGET=y
> -CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
> -CONFIG_USB_GADGET_VENDOR_NUM=0x2207
> -CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
> -CONFIG_USB_GADGET_DWC2_OTG=y
> -CONFIG_USB_FUNCTION_MASS_STORAGE=y
> CONFIG_DM_VIDEO=y
> +# CONFIG_VIDEO_BPP8 is not set
> CONFIG_CONSOLE_TRUETYPE=y
> CONFIG_DISPLAY=y
> CONFIG_VIDEO_ROCKCHIP=y
> @@ -96,6 +99,6 @@ CONFIG_DISPLAY_ROCKCHIP_EDP=y
> CONFIG_DISPLAY_ROCKCHIP_HDMI=y
> # CONFIG_USE_PRIVATE_LIBGCC is not set
> CONFIG_USE_TINY_PRINTF=y
> +CONFIG_SPL_TINY_MEMSET=y
> CONFIG_CMD_DHRYSTONE=y
> CONFIG_ERRNO_STR=y
> -# CONFIG_SPL_OF_LIBFDT is not set
> --
> 2.21.0
>
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