[U-Boot] [PATCH 2/5] armv8: fsl-layerscape: add base addresses for several devices

[laurentiu.tudor at nxp.com]

From: Laurentiu Tudor <laurentiu.tudor at nxp.com>

Add CCSR base addresses for ESDHC2, EDMA QDMA, DISPLAY and GPU devices.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor at nxp.com>
---
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 7cd5333ff4..84bed8d423 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -25,6 +25,8 @@
 #define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR	(CONFIG_SYS_IMMR + 0x00370000)
 #define SYS_FSL_QSPI_ADDR			(CONFIG_SYS_IMMR + 0x010c0000)
 #define CONFIG_SYS_FSL_ESDHC_ADDR		(CONFIG_SYS_IMMR + 0x01140000)
+#define FSL_ESDHC1_BASE_ADDR			CONFIG_SYS_FSL_ESDHC_ADDR
+#define FSL_ESDHC2_BASE_ADDR			(CONFIG_SYS_IMMR + 0x01150000)
 #ifndef CONFIG_NXP_LSCH3_2
 #define CONFIG_SYS_IFC_ADDR			(CONFIG_SYS_IMMR + 0x01240000)
 #endif
@@ -79,10 +81,23 @@
 #define TZASC_REGION_ATTRIBUTES_0(x)	((TZASC1_BASE + (x * 0x10000)) + 0x110)
 #define TZASC_REGION_ID_ACCESS_0(x)	((TZASC1_BASE + (x * 0x10000)) + 0x114)
 
+/* EDMA */
+#define EDMA_BASE_ADDR				(CONFIG_SYS_IMMR + 0x012c0000)
+
 /* SATA */
 #define AHCI_BASE_ADDR1				(CONFIG_SYS_IMMR + 0x02200000)
 #define AHCI_BASE_ADDR2				(CONFIG_SYS_IMMR + 0x02210000)
 
+/* QDMA */
+#define QDMA_BASE_ADDR				(CONFIG_SYS_IMMR + 0x07380000)
+#define QMAN_CQSIDR_REG				0x20a80
+
+/* DISPLAY */
+#define DISPLAY_BASE_ADDR			(CONFIG_SYS_IMMR + 0x0e080000)
+
+/* GPU */
+#define GPU_BASE_ADDR				(CONFIG_SYS_IMMR + 0x0e0c0000)
+
 /* SFP */
 #define CONFIG_SYS_SFP_ADDR		(CONFIG_SYS_IMMR + 0x00e80200)
 
-- 
2.17.1