[U-Boot] [linux-sunxi] [PATCH 0/6] sunxi: H6: Enable USB (2.0) support

Jagan Teki jagan at amarulasolutions.com
Tue Jun 18 07:50:23 UTC 2019

On Thu, May 16, 2019 at 6:56 AM Andre Przywara <andre.przywara at arm.com> wrote:
> Hi,
> this series enables USB support on the H6 boards. This is mostly just
> adding some missing pieces here and there, the actual controller and PHY
> are very similar to the previous ones, if not identical.
> This is for the 2.0 ports only at the moment, USB 3.0 will be done
> later (started porting Icenowy's Linux driver).
> The Pine H64 shares a similar problem as the Pine64+ boards regarding
> the upper USB port. To enable this port, we need the first patch
> from the series [1] fixing this issue on the A64 boards.
> Patch 1 is a drive-by patch to bring SUNXI_GPIO to Kconfig, as this was
> lingering in one of my branches for a while.
> Patch 2 enables GPIO support for the H6, as this is needed for the Pine
> H64 to enable the VBUS regulator.
> Patch 3 adds the clock and reset gates mappings for the USB controller and
> the PHY, the values are taken from the manual and verified against
> Linux.
> Patch 4 adds some code to the PHY driver to skip over not implemented
> PHYs, as the H6 uses a PHY0/PHY3 combination in the DT.
> Patch 5 then eventually enables USB in the existing defconfigs.
> Patch 6 adds the .dts fixes required to get the upper USB port to work
> on the Pine H64.
> Clément, can you please verify that this works for the Beelink box?
> I guess the USB 2.0 port is probably the OTG one, so this setup would
> look somewhat similar to the PineH64, which would allow you to copy
> the USB DT nodes from there.
> Cheers,
> Andre.
> [1] https://lists.denx.de/pipermail/u-boot/2019-May/369520.html
> Andre Przywara (6):
>   sunxi: move SUNXI_GPIO to Kconfig
>   sunxi: gpio: Enable support for H6 pin controller
>   sunxi: clocks: Add H6 USB clock gates and resets
>   sunxi: phy: Add USB PHY support for Allwinner H6
>   sunxi: H6: Enable USB for existing boards
>   sunxi: Pine64: DTS: enable USB PHY 0 for HCI0

Except 6/6 (it can be part of DTS sync during MW) and rest

Reviewed-by: Jagan Teki <jagan at amarulasolutions.com>

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