[U-Boot] [PATCH v3 11/13] clk: sunxi: h3: Implement EPHY CLK and RESET
Joe Hershberger
joe.hershberger at ni.com
Fri Mar 1 21:12:01 UTC 2019
On Wed, Feb 27, 2019 at 1:02 PM Jagan Teki <jagan at amarulasolutions.com> wrote:
>
> EPHY CLK and RESET is available in Allwinner H3 EMAC
> via mdio-mux node of internal PHY. Add the respetive
Please fix typo in log above. respetive -> respective
> clock and reset reg and bits.
>
> Cc: Joe Hershberger <joe.hershberger at ni.com>
> Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger at ni.com>
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