[U-Boot] [PATCH] ARM: mvebu: db-88f6820-amc: enable SPI_FLASH_BAR

[Stefan Roese]

On 02.03.19 12:53, Vignesh Raghavendra wrote:
> 
> 
> On 02-Mar-19 5:02 PM, Stefan Roese wrote:
> [...]
>>>
>>> It would be great if driver could be modified to support 3 and 4 byte
>>> addressing modes.
>>
>> I fail to see, what really is needed to make the SPI driver support
>> 3 and 4 byte addressing modes. I recently added the MT7688 SPI
>> driver (mt7621_spi.c) which supports 3 and 4 byte mode and I remember
>> no driver specials that I needed to implement for this feature. Its
>> address mode agnostic AFAICT and just xfers a buffer of data to and
>> from the SPI device.
>>
> 
> Certain SPI controllers have special HW support to support SPI flashes
> and therefore need knowledge of flash specific information such as
> opcode, no. of address bytes etc. More details in this blog[1] Such
> controllers should ideally use spi-mem interface like [2]
> I see this line in kirkwood_spi.c[3] which seems to hard code address
> bytes to 3? Can't really be sure w/o looking at the datasheet of SPI
> controllers.

I remember working on the Marvell SPI controller for Armada XP a few
years ago. This 3BYTE mode is only for the special "direct mode", that
is also supported by this controller. AFAIR, we don't use this direct
mode in U-Boot at all. So setting this register to 3BYTE mode should be
a "no-op" right now.
  
> [1]
> https://bootlin.com/blog/spi-mem-bringing-some-consistency-to-the-spi-memory-ecosystem/
> [2] https://patchwork.ozlabs.org/patch/1039718/
> [3]
> https://elixir.bootlin.com/u-boot/latest/source/drivers/spi/kirkwood_spi.c#L132
> 
>> Could you please let me know, what exactly is missing for this 4 byte
>> mode?
>>
>> Thanks,
>> Stefan
>>

Thanks,
Stefan